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PIO FIFO debug flags and interrupt support #7502

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2c2b2b8
misc: rpi-pio: In-kernel API fixes
pelwell Jul 13, 2026
670aec6
misc: rp1-pio: Add sm_get_dmactrl and sm_get_flags
pelwell Jun 16, 2026
477a0cb
misc: rp1-pio: Add support for PIO interrupts
pelwell Jul 2, 2026
297b133
arm64: dts: rp1: Declare the PIO interrupts
pelwell Jun 25, 2026
d8e45c2
misc: rp1-pio: Non-blocking blocking operations
pelwell Jul 21, 2026
153731b
serial: Add rp1-pio-uart - a PIO-based UART
pelwell Jul 15, 2026
0456454
configs: Add SERIAL_RP1_PIO_UART=m
pelwell Jul 15, 2026
b91786f
overlays: Add the rp1-pio-uart overlay
pelwell Jul 15, 2026
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1 change: 1 addition & 0 deletions arch/arm/boot/dts/overlays/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -247,6 +247,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
ramoops-pi4.dtbo \
rootmaster.dtbo \
rotary-encoder.dtbo \
rp1-pio-uart.dtbo \
rpi-backlight.dtbo \
rpi-codeczero.dtbo \
rpi-dacplus.dtbo \
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11 changes: 11 additions & 0 deletions arch/arm/boot/dts/overlays/README
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Expand Up @@ -4527,6 +4527,17 @@ Params: pin_a GPIO connected to rotary encoder channel A
common) and "binary".


Name: rp1-pio-uart
Info: Configures a software UART implemented using the RP1 PIO block, with
DMA moving data and a PIO interrupt used for break detection. Only
8N1 with no hardware flow control is supported. Only usable on
Raspberry Pi 5 and other platforms with an RP1 southbridge.
Load: dtoverlay=rp1-pio-uart,<param>=<val>
Params: tx_pin GPIO used for TXD (any free - default 14)

rx_pin GPIO used for RXD (any free - default 15)


Name: rpi-backlight
Info: Raspberry Pi official display backlight driver
Load: dtoverlay=rpi-backlight
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25 changes: 25 additions & 0 deletions arch/arm/boot/dts/overlays/rp1-pio-uart-overlay.dts
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@@ -0,0 +1,25 @@
// SPDX-License-Identifier: GPL-2.0
// Device tree overlay for the RP1 PIO-based UART driver.
/dts-v1/;
/plugin/;

/ {
compatible = "brcm,bcm2712";

fragment@0 {
target-path = "/";
__overlay__ {
rp1_pio_uart: rp1_pio_uart@e {
compatible = "raspberrypi,rp1-pio-uart";
tx-gpios = <&gpio 14 0>;
rx-gpios = <&gpio 15 0>;
status = "okay";
};
};
};

__overrides__ {
tx_pin = <&rp1_pio_uart>, "tx-gpios:4";
rx_pin = <&rp1_pio_uart>, "rx-gpios:4";
};
};
2 changes: 2 additions & 0 deletions arch/arm64/boot/dts/broadcom/rp1.dtsi
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Expand Up @@ -1057,6 +1057,8 @@
reg = <0xc0 0x40178000 0x0 0x20>;
compatible = "raspberrypi,rp1-pio";
firmware = <&rp1_firmware>;
interrupts = <RP1_INT_PIO_0 IRQ_TYPE_EDGE_RISING>,
<RP1_INT_PIO_1 IRQ_TYPE_EDGE_RISING>;
dmas = <&rp1_dma RP1_DMA_PIO_CH0_TX>, <&rp1_dma RP1_DMA_PIO_CH0_RX>,
<&rp1_dma RP1_DMA_PIO_CH1_TX>, <&rp1_dma RP1_DMA_PIO_CH1_RX>,
<&rp1_dma RP1_DMA_PIO_CH2_TX>, <&rp1_dma RP1_DMA_PIO_CH2_RX>,
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1 change: 1 addition & 0 deletions arch/arm64/configs/bcm2711_defconfig
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Expand Up @@ -746,6 +746,7 @@ CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_SC16IS7XX=m
CONFIG_SERIAL_RPI_FW=m
CONFIG_SERIAL_RP1_PIO_UART=m
CONFIG_SERIAL_DEV_BUS=y
CONFIG_TTY_PRINTK=y
CONFIG_HW_RANDOM=y
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1 change: 1 addition & 0 deletions arch/arm64/configs/bcm2711_rt_defconfig
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Expand Up @@ -745,6 +745,7 @@ CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_SC16IS7XX=m
CONFIG_SERIAL_RPI_FW=m
CONFIG_SERIAL_RP1_PIO_UART=m
CONFIG_SERIAL_DEV_BUS=y
CONFIG_TTY_PRINTK=y
CONFIG_HW_RANDOM=y
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1 change: 1 addition & 0 deletions arch/arm64/configs/bcm2712_defconfig
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Expand Up @@ -748,6 +748,7 @@ CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_SC16IS7XX=m
CONFIG_SERIAL_RP1_PIO_UART=m
CONFIG_SERIAL_DEV_BUS=y
CONFIG_TTY_PRINTK=y
CONFIG_HW_RANDOM=y
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18 changes: 17 additions & 1 deletion drivers/misc/rp1-fw-pio.h
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2023 2023-2024 Raspberry Pi Ltd.
* Copyright (C) 2023-2026 Raspberry Pi Ltd.
*/

#ifndef __SOC_RP1_FIRMWARE_OPS_H__
Expand Down Expand Up @@ -49,8 +49,24 @@ enum rp1_pio_ops {

PIO_SM_FIFO_STATE, // u16 sm, u8 tx -> u16 level, u8 empty, u8 full
PIO_SM_DRAIN_TX, // u16 sm
PIO_SM_GET_FLAGS, // u16 sm, u8 clear, u8 rsvd, u32 flags, u32 wait -> u32 level
PIO_SM_GET_DMACTRL, // u16 sm, u16 is_tx -> u32 ctrl

PIO_SET_IRQN_SOURCE_MASK_ENABLED, // u16 irq_index, u8 enabled, u8 rsvd,
// uint32_t source_mask
PIO_INTERRUPT_GET, // u16 pio_interrupt_num -> u8 active
PIO_INTERRUPT_CLEAR, // u16 pio_interrupt_num

PIO_COUNT
};

// Don't include this here to avoid multiple definitions
//
// enum pio_sm_flags {
// PIO_SM_FLAG_TXSTALL = 0x0001,
// PIO_SM_FLAG_RXSTALL = 0x0002,
// PIO_SM_FLAG_TXOVER = 0x0004,
// PIO_SM_FLAG_RXUNDER = 0x0008,
// };

#endif
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