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Pull requests: pulp-platform/cheshire

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Pull requests list

build(sw): derive iDMA register header from PeakRDL c-header
#281 opened Jun 25, 2026 by DanielKellerM • Draft
2 tasks
1
make: Separate models from CHS_SIM_ALL
#280 opened Jun 24, 2026 by colluca Contributor Loading…
idma_wrap: Add missing submodule port
#279 opened Jun 19, 2026 by niwis Contributor Loading…
feat(smp): add software and vip support for multiple non-coherent cores
#277 opened Jun 17, 2026 by ricted98 Contributor • Draft
4
ci: temporary fix for VCS + update github actions
#276 opened Jun 12, 2026 by fischeti Contributor Loading…
1 task
feat: Build dtb with bitstream
#275 opened May 27, 2026 by CyrilKoe Contributor • Draft
feat(fpga): Add Alveo u280 fpga support
#271 opened May 6, 2026 by smanoni Contributor Loading…
target/xilinx: Add VCU108 support
#264 opened Mar 30, 2026 by celuk Loading…
treewide: Update CVA6 to pulp-v3, switch to HPDCache and pulp-linux
#259 opened Feb 20, 2026 by paulsc96 Collaborator • Draft
clint: systemRDL based register generation
#252 opened Nov 30, 2025 by fischeti Contributor Loading…
3 of 4 tasks
2
mt/fesvr : Add FESVR support to cheshire
#248 opened Oct 2, 2025 by mtravaillard Loading…
Add ZCU104 board support
#245 opened Sep 4, 2025 by AbdelkadirChantar Loading…
[RVV] Add support for Ara vector processor
#231 opened Jun 24, 2025 by mp-17 • Draft
Add Verilator fast simulation
#230 opened Jun 20, 2025 by MaxWipfli • Draft v0.4.0
1
10
Add user guide about building cheshire on Windows
#228 opened Jun 18, 2025 by HepoH3 Contributor • Draft
Add windows support
#227 opened Jun 18, 2025 by HepoH3 Contributor Loading…
10
Add Coremark.
#217 opened May 30, 2025 by yvantor Contributor Loading…
4 tasks done
@yvantor
11
WIP: zx/c910 preopen
#190 opened Apr 2, 2025 by Aquaticfuller Member • Draft
@Aquaticfuller
util/openocd: fix deprecation warnings, fix virtaddr translation
#186 opened Mar 24, 2025 by midnightveil Contributor Loading…
hw: Adds support for iDMA with configurable frontend(s) (desc64 and/or reg64)
#183 opened Mar 9, 2025 by mineiwik • Draft v0.4.0
1
7
WIP: synthesis using yosys-slang
#181 opened Feb 26, 2025 by phsauter Contributor • Draft
5 of 8 tasks
v0.4.0
Draft: Add LLC bypass region for Carfield
#176 opened Jan 5, 2025 by CyrilKoe Contributor • Draft
4 tasks
@CyrilKoe
3
Add Litmus tests
#170 opened Dec 3, 2024 by ezelioli Contributor Loading…
@ezelioli
16
treewide: Improve SMP support
#169 opened Dec 3, 2024 by ezelioli Contributor Loading…
1
@ezelioli
3
target/fpga: Improve HyperRAM
#162 opened Oct 29, 2024 by fabianaufdermaur • Draft
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