Fix swapped AXI_BUS widths in synthesis benchmarks - #449
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Close as #445, approved and to be merged very soon, already worked on it. |
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Fixes #444.
This corrects the parameter mapping for
AXI_ADDR_WIDTH,AXI_DATA_WIDTH, andAXI_ID_WIDTHinsynth_axi_isolate,synth_axi_serializer, andsynth_axi_to_mem_bankedto prevent width-expansion/truncation warnings during synthesis.