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8fb8708
dt-bindings: display: spacemit: add K3 Saturn DPU controller
codykang-dev Aug 9, 2026
7d45341
dt-bindings: phy: add SpacemiT K3 Innosilicon DP PHY
codykang-dev Aug 9, 2026
cd3ebd6
dt-bindings: display: spacemit: add K3 Innosilicon DP/eDP controller
codykang-dev Aug 9, 2026
1cb5a33
dt-bindings: soc: spacemit: allow eDP/DP PHY PLL pixel clocks on K3 APMU
codykang-dev Aug 9, 2026
3a73e89
phy: spacemit: add Innosilicon DP TX PHY driver
codykang-dev Aug 9, 2026
27ca425
clk: spacemit: k3: parent eDP/DP pixel clock to the PHY PLL
codykang-dev Aug 9, 2026
864353b
drm/spacemit: add Saturn DPU register model
codykang-dev Aug 9, 2026
3dc2b16
drm/spacemit: add Saturn DPU core types, cmdlist and display MMU
codykang-dev Aug 9, 2026
564a499
drm/spacemit: add Saturn DPU hardware backend
codykang-dev Aug 9, 2026
cc5fc96
drm/spacemit: add Saturn DPU KMS pipeline
codykang-dev Aug 9, 2026
e6398bd
drm/spacemit: add Saturn DPU DRM device driver
codykang-dev Aug 9, 2026
c14ac1e
drm/spacemit: add Innosilicon DP/eDP controller bridge driver
codykang-dev Aug 9, 2026
4931607
MAINTAINERS: add SpacemiT K3 display driver entry
codykang-dev Aug 9, 2026
1677ba4
riscv: dts: spacemit: k3: add display nodes
codykang-dev Aug 9, 2026
e3960ce
riscv: dts: spacemit: k3-pico-itx: enable the DisplayPort output
codykang-dev Aug 9, 2026
00b1040
riscv: dts: spacemit: k3-com260-ifx: enable the DisplayPort output
codykang-dev Aug 9, 2026
857acfb
riscv: defconfig: spacemit: k3: enable display driver
codykang-dev Aug 9, 2026
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Original file line number Diff line number Diff line change
@@ -0,0 +1,141 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/spacemit/spacemit,k3-inno-dp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: SpacemiT K3 Innosilicon DisplayPort / embedded DisplayPort Controller

maintainers:
- Cody Kang <codykang.hk@gmail.com>

description:
Innosilicon DisplayPort transmit controller integrated in the SpacemiT K3
SoC. The K3 has two instances of the same block sharing one compatible;
each acts as embedded or external DisplayPort depending on whether its
output port drives a panel or a connector.

properties:
compatible:
const: spacemit,k3-inno-dp

reg:
maxItems: 1

interrupts:
maxItems: 1
description: Link and hot-plug events.

clocks:
items:
- description: Pixel clock for the controller.
- description:
Pixel clock generated by the DP PHY PLL; the pixel clock above is
parented onto it in use.

clock-names:
items:
- const: pxclk
- const: pll

resets:
maxItems: 1
description: Controller-wide reset signal.

phys:
maxItems: 1
description: Phandle to the K3 Innosilicon DP PHY.

phy-names:
items:
- const: dp

ports:
$ref: /schemas/graph.yaml#/properties/ports

properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: Video input from the DPU.

port@1:
$ref: /schemas/graph.yaml#/properties/port
description: Output to the panel or to the DisplayPort connector.

required:
- port@0
- port@1

aux-bus:
$ref: /schemas/display/dp-aux-bus.yaml#
description:
The DisplayPort AUX bus. Present when the output drives an embedded
panel, which is described as a child of this node and identifies itself
over AUX. Absent when the output is a connector.

phy:
$ref: /schemas/phy/spacemit,k3-inno-dp-phy.yaml#
description:
The DisplayPort PHY. Its registers live inside this controller's
register window, so it is described here as a child node.

required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- resets
- phys
- phy-names
- ports

additionalProperties: false

examples:
- |
#include <dt-bindings/clock/spacemit,k3-clocks.h>
#include <dt-bindings/reset/spacemit,k3-resets.h>
#include <dt-bindings/interrupt-controller/irq.h>

soc {
#address-cells = <2>;
#size-cells = <2>;

edp@cac84000 {
compatible = "spacemit,k3-inno-dp";
reg = <0x0 0xcac84000 0x0 0x4000>;
interrupts = <132 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon_apmu CLK_APMU_EDP0_PXCLK>, <&edp0_phy>;
clock-names = "pxclk", "pll";
resets = <&syscon_apmu RESET_APMU_EDP0>;
phys = <&edp0_phy>;
phy-names = "dp";

edp0_phy: phy {
compatible = "spacemit,k3-inno-dp-phy";
#phy-cells = <0>;
#clock-cells = <0>;
clock-output-names = "edp0_pll_pxclk";
};

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
endpoint {
remote-endpoint = <&dpu0_out>;
};
};

port@1 {
reg = <1>;
endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
};
Original file line number Diff line number Diff line change
@@ -0,0 +1,132 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/spacemit/spacemit,k3-saturn-dpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: SpacemiT K3 Saturn Display Processing Unit

maintainers:
- Cody Kang <codykang.hk@gmail.com>

description:
The Saturn DPU is the display processing unit of the SpacemiT K3 SoC. It
composes the display planes and drives the timing for one display path. Its
output goes to a DisplayPort or embedded DisplayPort controller. The K3 has
two instances.

properties:
compatible:
const: spacemit,k3-saturn-dpu

reg:
maxItems: 1

interrupts:
items:
- description: Online (live display) compose path.
- description: Offline (writeback) compose path.

interrupt-names:
items:
- const: online
- const: offline

clocks:
items:
- description: Pixel clock.
- description: Memory clock for the compose pipeline.
- description: AXI bus clock.
- description: DSI escape clock.
- description: DSC clock.

clock-names:
items:
- const: pxclk
- const: mclk
- const: aclk
- const: escclk
- const: dscclk

resets:
items:
- description: Memory clock domain.
- description: LCD domain, shared with the downstream controller.
- description: DSI escape clock domain.
- description: AXI clock domain.
- description: DSC domain.

reset-names:
items:
- const: mclk
- const: lcd
- const: esc
- const: aclk
- const: dsc

ports:
$ref: /schemas/graph.yaml#/properties/ports

properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description: Video output to the DisplayPort or eDP controller.

required:
- port@0

required:
- compatible
- reg
- interrupts
- interrupt-names
- clocks
- clock-names
- resets
- reset-names
- ports

additionalProperties: false

examples:
- |
#include <dt-bindings/clock/spacemit,k3-clocks.h>
#include <dt-bindings/reset/spacemit,k3-resets.h>
#include <dt-bindings/interrupt-controller/irq.h>

soc {
#address-cells = <2>;
#size-cells = <2>;

dpu@c0340000 {
compatible = "spacemit,k3-saturn-dpu";
reg = <0x0 0xc0340000 0x0 0x54000>;
interrupts = <90 IRQ_TYPE_LEVEL_HIGH>,
<89 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "online", "offline";
clocks = <&syscon_apmu CLK_APMU_LCD_PXCLK>,
<&syscon_apmu CLK_APMU_LCD_MCLK>,
<&syscon_apmu CLK_APMU_DPU_ACLK>,
<&syscon_apmu CLK_APMU_DSI_ESC>,
<&syscon_apmu CLK_APMU_LCD_DSC>;
clock-names = "pxclk", "mclk", "aclk", "escclk", "dscclk";
resets = <&syscon_apmu RESET_APMU_LCD_MCLK>,
<&syscon_apmu RESET_APMU_LCD>,
<&syscon_apmu RESET_APMU_DSI_ESC>,
<&syscon_apmu RESET_APMU_DPU_ACLK>,
<&syscon_apmu RESET_APMU_LCD_DSCCLK>;
reset-names = "mclk", "lcd", "esc", "aclk", "dsc";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
endpoint {
remote-endpoint = <&edp0_in>;
};
};
};
};
};
48 changes: 48 additions & 0 deletions Documentation/devicetree/bindings/phy/spacemit,k3-inno-dp-phy.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,48 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/spacemit,k3-inno-dp-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: SpacemiT K3 Innosilicon DisplayPort PHY

maintainers:
- Cody Kang <codykang.hk@gmail.com>

description:
Innosilicon four-lane DisplayPort transmit PHY integrated in the SpacemiT
K3 SoC, one per DisplayPort controller. Its registers are interleaved with
the controller's own inside a single register window, so it is described as
a child of the controller and owns neither a reg nor a reset.

The PHY provides the pixel clock its PLL generates, which the APMU
pixel-clock mux takes as one of its inputs.

properties:
compatible:
const: spacemit,k3-inno-dp-phy

"#phy-cells":
const: 0

"#clock-cells":
const: 0

clock-output-names:
maxItems: 1

required:
- compatible
- "#phy-cells"
- "#clock-cells"

additionalProperties: false

examples:
- |
phy {
compatible = "spacemit,k3-inno-dp-phy";
#phy-cells = <0>;
#clock-cells = <0>;
clock-output-names = "edp0_pll_pxclk";
};
Original file line number Diff line number Diff line change
Expand Up @@ -31,14 +31,18 @@ properties:
maxItems: 1

clocks:
maxItems: 4
minItems: 4
maxItems: 6

clock-names:
minItems: 4
items:
- const: osc
- const: vctcxo_1m
- const: vctcxo_3m
- const: vctcxo_24m
- const: edp0_pll_pxclk
- const: edp1_pll_pxclk

"#clock-cells":
const: 1
Expand Down Expand Up @@ -95,6 +99,21 @@ allOf:
- clocks
- clock-names
- "#clock-cells"
# Only the K3 APMU exposes the two eDP/DP PHY PLL pixel clocks as extra
# inputs (parents of its eDP pixel-clock muxes); every other variant has
# the four base oscillator inputs only.
- if:
not:
properties:
compatible:
contains:
const: spacemit,k3-syscon-apmu
then:
properties:
clocks:
maxItems: 4
clock-names:
maxItems: 4

additionalProperties: false

Expand Down
10 changes: 10 additions & 0 deletions MAINTAINERS
Original file line number Diff line number Diff line change
Expand Up @@ -25429,6 +25429,16 @@ S: Maintained
F: Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml
F: drivers/i2c/busses/i2c-k1.c

SPACEMIT K3 DISPLAY DRIVER
M: Cody Kang <codykang.hk@gmail.com>
L: dri-devel@lists.freedesktop.org
L: linux-riscv@lists.infradead.org
S: Maintained
F: Documentation/devicetree/bindings/display/spacemit/
F: Documentation/devicetree/bindings/phy/spacemit,k3-inno-dp-phy.yaml
F: drivers/gpu/drm/spacemit/
F: drivers/phy/spacemit/phy-k3-inno-dp.c

SPANISH DOCUMENTATION
M: Carlos Bilbao <carlos.bilbao@kernel.org>
R: Avadhut Naik <avadhut.naik@amd.com>
Expand Down
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