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Merged
Kingcom merged 1 commit into from
Jul 7, 2026
Merged

Update PSP VFPU1/VFPU4-1.3 instructions #256

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26 changes: 18 additions & 8 deletions Archs/MIPS/MipsOpcodes.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -610,14 +610,20 @@ const tMipsOpcode MipsOpcodes[] = {
// |= VFPU1| f | |
// -----6-------3---------------------------------------------------
// |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--|
// | VMUL | VDOT | VSCL | --- | VHDP | VDET | VCRS | --- |
// | VMUL | VDOT | VSCL | --- | VHDP | VCRS | VDET | --- |
// |-------|-------|-------|-------|-------|-------|-------|-------|
{ "vmul.S", "vd,vs,vt", MIPS_VFPU1(0), MA_PSP, MO_VFPU },
{ "vdot.S", "vd,vs,vt", MIPS_VFPU1(1), MA_PSP, MO_VFPU },
{ "vscl.S", "vd,vs,vSt", MIPS_VFPU1(2), MA_PSP, MO_VFPU },
{ "vhdp.S", "vd,vs,vt", MIPS_VFPU1(4), MA_PSP, MO_VFPU },
{ "vdet.S", "vd,vs,vt", MIPS_VFPU1(5), MA_PSP, MO_VFPU },
{ "vcrs.S", "vd,vs,vt", MIPS_VFPU1(6), MA_PSP, MO_VFPU },
{ "vdot.p", "vSd,vs,vt", MIPS_VFPU1(1)|MIPS_VFPUSIZE(1), MA_PSP, MO_VFPU|MO_VFPU_PAIR },
{ "vdot.t", "vSd,vs,vt", MIPS_VFPU1(1)|MIPS_VFPUSIZE(2), MA_PSP, MO_VFPU|MO_VFPU_TRIPLE },
{ "vdot.q", "vSd,vs,vt", MIPS_VFPU1(1)|MIPS_VFPUSIZE(3), MA_PSP, MO_VFPU|MO_VFPU_QUAD },
{ "vscl.p", "vd,vs,vSt", MIPS_VFPU1(2)|MIPS_VFPUSIZE(1), MA_PSP, MO_VFPU|MO_VFPU_PAIR },
{ "vscl.t", "vd,vs,vSt", MIPS_VFPU1(2)|MIPS_VFPUSIZE(2), MA_PSP, MO_VFPU|MO_VFPU_TRIPLE },
{ "vscl.q", "vd,vs,vSt", MIPS_VFPU1(2)|MIPS_VFPUSIZE(3), MA_PSP, MO_VFPU|MO_VFPU_QUAD },
{ "vhdp.p", "vSd,vs,vt", MIPS_VFPU1(4)|MIPS_VFPUSIZE(1), MA_PSP, MO_VFPU|MO_VFPU_PAIR },
{ "vhdp.t", "vSd,vs,vt", MIPS_VFPU1(4)|MIPS_VFPUSIZE(2), MA_PSP, MO_VFPU|MO_VFPU_TRIPLE },
{ "vhdp.q", "vSd,vs,vt", MIPS_VFPU1(4)|MIPS_VFPUSIZE(3), MA_PSP, MO_VFPU|MO_VFPU_QUAD },
{ "vcrs.t", "vd,vs,vt", MIPS_VFPU1(5)|MIPS_VFPUSIZE(2), MA_PSP, MO_VFPU|MO_VFPU_TRIPLE },
{ "vdet.p", "vSd,vs,vt", MIPS_VFPU1(6)|MIPS_VFPUSIZE(1), MA_PSP, MO_VFPU|MO_VFPU_PAIR },

// 31-------26-----23----------------------------------------------0
// |= VFPU3| f | |
Expand Down Expand Up @@ -766,8 +772,12 @@ const tMipsOpcode MipsOpcodes[] = {
{ "vbfy2.S", "vd,vs", MIPS_VFPU4_13(0x03), MA_PSP, MO_VFPU },
{ "vocp.S", "vd,vs", MIPS_VFPU4_13(0x04), MA_PSP, MO_VFPU },
{ "vsocp.S", "vd,vs", MIPS_VFPU4_13(0x05), MA_PSP, MO_VFPU },
{ "vfad.S", "vd,vs", MIPS_VFPU4_13(0x06), MA_PSP, MO_VFPU },
{ "vavg.S", "vd,vs", MIPS_VFPU4_13(0x07), MA_PSP, MO_VFPU },
{ "vfad.p", "vSd,vs", MIPS_VFPU4_13(0x06)|MIPS_VFPUSIZE(1), MA_PSP, MO_VFPU|MO_VFPU_PAIR },
{ "vfad.t", "vSd,vs", MIPS_VFPU4_13(0x06)|MIPS_VFPUSIZE(2), MA_PSP, MO_VFPU|MO_VFPU_TRIPLE },
{ "vfad.q", "vSd,vs", MIPS_VFPU4_13(0x06)|MIPS_VFPUSIZE(3), MA_PSP, MO_VFPU|MO_VFPU_QUAD },
{ "vavg.p", "vSd,vs", MIPS_VFPU4_13(0x07)|MIPS_VFPUSIZE(1), MA_PSP, MO_VFPU|MO_VFPU_PAIR },
{ "vavg.t", "vSd,vs", MIPS_VFPU4_13(0x07)|MIPS_VFPUSIZE(2), MA_PSP, MO_VFPU|MO_VFPU_TRIPLE },
{ "vavg.q", "vSd,vs", MIPS_VFPU4_13(0x07)|MIPS_VFPUSIZE(3), MA_PSP, MO_VFPU|MO_VFPU_QUAD },
{ "vsrt3.S", "vd,vs", MIPS_VFPU4_13(0x08), MA_PSP, MO_VFPU },
{ "vsrt4.S", "vd,vs", MIPS_VFPU4_13(0x09), MA_PSP, MO_VFPU },
{ "vsgn.S", "vd,vs", MIPS_VFPU4_13(0x0a), MA_PSP, MO_VFPU },
Expand Down
13 changes: 13 additions & 0 deletions Readme.md
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Expand Up @@ -1185,6 +1185,19 @@ will align the memory address to a multiple of 4, then create a label named `Mai
* renamed `vuc2i.s` to [`vuc2ifs.s`](https://pspdev.github.io/vfpu-docs/#vuc2ifs.s)
* changed [`vfim.s`](https://pspdev.github.io/vfpu-docs/#vfim.s) half float immediate parsing from binary representation to float literals (was:`vfim.s S100,0x3f800000`, now: `vfim.s S100,1.0`)
* removed invalid instructions `vsbn.p`/`vsbn.t`/`vsbn.q`
* removed invalid instructions `vdet.s`/`vdet.t`/`vdet.q`
* removed invalid instructions `vcrs.s`/`vcrs.p`/`vcrs.q`
* removed invalid instruction `vdot.s`
* removed invalid instruction `vhdp.s`
* removed invalid instruction `vscl.s`
* removed invalid instruction `vavg.s`
* removed invalid instruction `vfad.s`
* corrected output encodings for [`vdet.p`](https://pspdev.github.io/vfpu-docs/#vdet.p) & [`vcrs.t`](https://pspdev.github.io/vfpu-docs/#vcrs.t)
* fixed `vd` register size for [`vdot.p`](https://pspdev.github.io/vfpu-docs/#vdot.p)/[`vdot.t`](https://pspdev.github.io/vfpu-docs/#vdot.q)/[`vdot.t`](https://pspdev.github.io/vfpu-docs/#vdot.q) (was: `vdot.t C103,C201,C201`, now: `vdot.t S103,C201,C201`)
* fixed `vd` register size for [`vhdp.p`](https://pspdev.github.io/vfpu-docs/#vhdp.p)/[`vhdp.t`](https://pspdev.github.io/vfpu-docs/#vhdp.q)/[`vhdp.t`](https://pspdev.github.io/vfpu-docs/#vhdp.q) (was: `vhdp.t C103,C201,C201`, now: `vhdp.t S103,C201,C201`)
* fixed `vd` register size for [`vdet.p`](https://pspdev.github.io/vfpu-docs/#vdet.p) (was: `vdet.p C103,C202,C212`, now: `vdet.p S103,C202,C212`)
* fixed `vd` register size for [`vavg.p`](https://pspdev.github.io/vfpu-docs/#vavg.p)/[`vavg.t`](https://pspdev.github.io/vfpu-docs/#vavg.q)/[`vavg.t`](https://pspdev.github.io/vfpu-docs/#vavg.q) (was: `vavg.t C103,C201,C201`, now: `vavg.t S103,C201,C201`)
* fixed `vd` register size for [`vfad.p`](https://pspdev.github.io/vfpu-docs/#vfad.p)/[`vfad.t`](https://pspdev.github.io/vfpu-docs/#vfad.q)/[`vfad.t`](https://pspdev.github.io/vfpu-docs/#vfad.q) (was: `vfad.t C103,C201,C201`, now: `vfad.t S103,C201,C201`)
* fixed `vt` register size for [`vscl.p`](https://pspdev.github.io/vfpu-docs/#vscl.p)/[`vscl.t`](https://pspdev.github.io/vfpu-docs/#vscl.q)/[`vscl.t`](https://pspdev.github.io/vfpu-docs/#vscl.q) (was: `vscl.t C100,C200,C203`, now: `vscl.t C100,C200,S203`)
* fixed `vd` register size for pack/unpack instructions (was: `vf2h.p C103,C202`, now: `vf2h.p S103,C202`)
* 2-to-1 packing instructions:
Expand Down
15 changes: 15 additions & 0 deletions Tests/MIPS/PSP Opcodes/PSP Opcodes.asm
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Expand Up @@ -59,6 +59,15 @@ vdiv.q C120,C430,C010

; VFPU1
vscl.t C100,C220,S333
vdot.p S113,C202,C202
vdot.t S301,C110,C110
vdot.t S223,C201,C301
vdot.q S333,C200,C200
vhdp.p S113,C202,C202
vhdp.t S223,C201,C201
vhdp.q S333,C200,C200
vdet.p S113,C202,C212
vcrs.t C101,C111,C121

; VFPU3
vcmp.s GT,S100,S101
Expand Down Expand Up @@ -103,6 +112,12 @@ vi2s.p S103,C202
vi2s.q C102,C200

; VFPU4-1.3
vavg.p S103,C202
vavg.t S103,C201
vavg.q S103,C200
vfad.p S103,C202
vfad.t S103,C201
vfad.q S103,C200
vt4444.q C102,C200
vt5551.q C102,C200
vt5650.q C102,C200
Expand Down
Binary file modified Tests/MIPS/PSP Opcodes/expected.bin
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