Express a complete SAR processing chain in Python and specialize the same program for native CPU execution or synthesizable Vitis HLS C++.
ALOS-1 San Francisco Bay scene focused by the omega-K chain.
SAR-DSL traces whole-array signal-processing programs into a compact sar MLIR dialect. FFTs, interpolation, reductions, phase transforms, layout changes, gathers, and compiled loops remain explicit long enough for fusion, memory planning, and target-specific scheduling. The language is backend-neutral: one statically shaped program feeds both the CPU and HLS paths.
| Layer | Role |
|---|---|
| Python DSL | NumPy-style tensors, reusable @sar.op compositions, static shape and dtype specialization |
| Shared IR | Domain verification, FFT/interpolation semantics, precision rules, layout and loop contracts |
| CPU backend | Linalg, bufferization, OpenMP, LLVM, and a reusable FFT/interpolation runtime |
| HLS backend | Split-complex affine loops, on-chip/external placement, banking, AXI interfaces, and Vitis HLS source generation |
The repository contains four complete chains, each with a SAR-DSL kernel and an independent NumPy reference.
| Algorithm | Collection | Main operations | Example |
|---|---|---|---|
| Omega-K (WKA) | stripmap | range/azimuth FFTs, bulk compression, Stolt interpolation | WKA |
| Range-Doppler (RDA) | stripmap | range compression, RCMC, azimuth compression | RDA |
| Chirp Scaling (CSA) | stripmap | FFTs and phase-only range migration correction | CSA |
| Polar Format (PFA) | spotlight | polar regridding and spatially variant apodization | PFA |
 Omega-K |
 Range-Doppler |
 Chirp Scaling |
 Polar Format + SVA |
512 × 512 synthetic point-target scenes produced by the checked-in CPU examples.
The stripmap kernels also process the same 16384 × 16384 ALOS-1 acquisition used by the independent hand-written WKA reference.
Omega-K |
 Range-Doppler |
 Chirp Scaling |
ALOS-1 San Francisco Bay focused images from the ASF DAAC granule described below.
The frontend serializes textual MLIR and does not require compiled MLIR Python bindings. sar-opt verifies and transforms the module; sar-translate emits target source. The CPU and HLS pipelines share the frontend and domain dialect, then diverge at target-specific lowering, memory planning, and scheduling.
See Architecture for design rationale and Dialect reference for operation and pass contracts.
The examples are checked against NumPy references and point-target metrics. The stripmap chains reproduce the expected Hann response; PFA additionally demonstrates spatially variant apodization.
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Left: range and azimuth impulse-response cuts. Right: PFA range response before and after SVA.
| Chain | IRW (range / azimuth) | PSLR (range / azimuth) | ISLR (range / azimuth) |
|---|---|---|---|
| Omega-K | 2.06 / 2.06 | −38.4 / −38.4 dB | −29.0 / −31.8 dB |
| Range-Doppler | 2.06 / 2.07 | −38.8 / −38.4 dB | −26.5 / −31.8 dB |
| Chirp Scaling | 2.06 / 2.07 | −38.5 / −38.4 dB | −29.0 / −31.8 dB |
The complete quality methodology, tolerances, PFA metrics, and precision comparison are maintained in the benchmark report.
The CPU backend emits native code with fused element-wise and layout loops. The following points are warm end-to-end runs at c128 precision; compile time is excluded.
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Throughput and speedup are redrawn from the versioned CPU measurement record.
| Chain | Input → output | SAR-DSL CPU | NumPy reference | Speedup |
|---|---|---|---|---|
| Omega-K | 16384² → 16384² | 3.684 s | 186.53 s | 50.6× |
| Range-Doppler | 16384² → 16384² | 3.911 s | 105.00 s | 26.8× |
| Chirp Scaling | 16384² → 16384² | 2.525 s | 73.43 s | 29.1× |
| Polar Format | 8192² → 16384² | 3.761 s | 155.43 s | 41.3× |
The portable FFT/interpolation pool remains capped at 32 workers by default. On the reference dual-socket host, topology-aware placement reaches 31.13 ms for a 2048² RDA run at 120 physical workers, while one-socket SMT oversubscription reaches 172.13 ms. The isolated MKL DFTI leaf is 3.1–4.9× faster than the portable runtime; the detailed comparison is in cpu_numa_mkl_2026_08_27.json.
The HLS backend emits a self-contained Vitis HLS package. Complex tensors become split real/imaginary planes; FFTs and gathers become affine loops; full-size intermediates may use compiler-managed external scratch arenas while compact tables and line caches remain on chip.
Synthesized production designs normalized by the configured resource budgets.
Compiler-selected strategies across an on-chip budget sweep.
Production-scale c64 AXI designs use the shipped xcvu13p-fhgb2104-2-i, a 4 ns target clock, 12.5% uncertainty, and 80% resource budgets. The three stripmap chains use ALOS-1 acquisition geometry; PFA uses its spotlight geometry.
| Design | Input → output | Estimated clock | Latency time | BRAM18K | URAM | DSP | FF | LUT |
|---|---|---|---|---|---|---|---|---|
| Omega-K, generated | 16384² → 16384² | 3.500 ns | 7.305 s | 1,410 | 960 | 2,668 | 767,232 | 860,085 |
| Omega-K, hand-written | 16384² → 16384² | 3.500 ns | 5.402 s | 672 | 848 | 2,860 | 769,377 | 658,256 |
| Range-Doppler, generated | 16384² → 16384² | 3.500 ns | 5.790 s | 1,736 | 852 | 1,453 | 686,807 | 697,239 |
| Chirp Scaling, generated | 16384² → 16384² | 3.627 ns | 4.467 s | 1,736 | 840 | 2,024 | 593,904 | 638,714 |
| Polar Format, generated | 8192² → 16384² | 3.500 ns | 23.395 s | 65 | 512 | 854 | 292,404 | 420,121 |
All production designs fit the configured resource budgets and the 4 ns board period. CSA is recorded with a 0.127 ns timing shortfall against the 3.5 ns post-uncertainty scheduling goal; timing is reported separately from hard resource-cap violations.
The measured FFT DSE identifies four parallel rows, stage grouping 2, and transfer width 4 as the balanced point for the bounded c64 probe. The gather DSE shows that a narrow completely banked band can reduce compute II from 4 to 1, but its small ap_memory kernels do not model production AXI behavior; production strategy selection remains displacement- and resource-aware.
The full synthesis tables, generated-package contracts, warning counts, DSE records, and provenance are in benchmarks/.
import sar
@sar.func
def range_compress(raw, replica):
spectrum = sar.fft(raw, axis=1) * replica
return sar.ifft(spectrum, axis=1)
# Call-site arrays specialize and execute the kernel on the CPU.
image = range_compress(raw_np, replica_np)
# The same graph can be specialized and emitted for HLS.
design = range_compress.specialize(
sar.c64[512, 512], sar.c64[512, 512]
).compile("hls", options={"interface": "axi"})
design.write_synthesis_script("hls_project/range_compress")Kernels specialize by static shape and dtype. NumPy arrays may be runtime arguments or compile-time constants. See the Python API and operator guide for the language surface.
The supported development platform is Linux x86-64. Required tools are CMake 3.20+, Ninja, a C++17 compiler, Python 3.10+, and NumPy. Vitis HLS is optional unless generated hardware packages are being simulated or synthesized.
git clone https://github.com/zeroherolin/sar-dsl.git
cd sar-dsl
git submodule update --init externals/llvm-project
python -m pip install numpy matplotlib pytest
make llvm
make build
export PYTHONPATH="$PWD/python${PYTHONPATH:+:$PYTHONPATH}"
make testFrontend-only tests do not require LLVM:
PYTHONPATH=python python -m pytest test/python -q \
-m "not requires_cpu and not requires_hls and not requires_vitis"Use python -m sar doctor to inspect tool discovery, backend availability, runtime configuration, and the artifact cache.
Each chain has a synthetic point-target example that runs without any external data:
PYTHONPATH=python python examples/wka/run_point_target_cpu.py --n 512
PYTHONPATH=python python examples/rda/run_point_target_cpu.py --n 512
PYTHONPATH=python python examples/csa/run_point_target_cpu.py --n 512
PYTHONPATH=python python examples/pfa/run_point_target_cpu.py --n 512The stripmap chains additionally include ALOS-1 CPU and HLS runners; PFA is a spotlight example and uses synthetic collection geometry. The real-data path uses ASF DAAC granule ALPSRP275140740-L1.0, an ALOS PALSAR FBS HH CEOS L1.0 product covering San Francisco Bay. Open the ASF Data Search record for the catalog entry; an Earthdata login may be required. Original data is © JAXA/METI; the archive stays outside the repository under the source provider's data terms.
Download and unpack the archive so examples/data/ALPSRP275140740-L1.0/IMG-HH-ALPSRP275140740-H1.0__A is available, extract the 16384 × 16384 complex64 raster once, then run a stripmap chain on it (the full-size scene needs tens of GiB of RAM):
unzip ~/Downloads/ALPSRP275140740-L1.0.zip -d examples/data
PYTHONPATH=python python examples/data/extract_alos.py
PYTHONPATH=python python examples/wka/run_alos_cpu.pySee examples/ for data preparation, HLS package generation, and algorithm-specific notes. The independent hand-written WKA implementation is a comparison design, not a compiler dependency.
| Document | Contents |
|---|---|
| Python API | Public language and compiler API |
| Defining operators | @sar.op, eager execution, and specialization |
| MATLAB guide | Indexing and convention mapping |
| Architecture | Compiler layers and design rationale |
| Dialect reference | Operations, invariants, and pass pipelines |
| Backends | CPU/HLS use, configuration, artifacts, and extension API |
| Benchmarks | Methodology and complete reference measurements |
| Project scope | Supported scope and known limits |
| Contributing | Development workflow and repository conventions |
include/sar/, lib/ dialects, analyses, conversions, and pipelines
runtime/ native FFT/interpolation runtime and allocation hooks
tools/ sar-opt, sar-translate, and sar-lsp-server
python/sar/ Python language, compiler driver, runtime, and backends
examples/ complete WKA, RDA, CSA, and PFA programs
benchmarks/ measurement runners, reports, figures, and result data
test/ MLIR lit tests and Python integration tests
docs/ architecture, backend, dialect, and API references
No archival publication is associated with this repository yet. GitHub exposes the software citation in CITATION.cff; include the commit hash used for an experiment so generated code and measurements remain reproducible.
MIT — see LICENSE. The compiler builds on LLVM/MLIR. External SAR data is obtained separately from its source provider; the ALOS-1 download and preparation path is documented above.