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Replace the hardcoded Q8-shaped KvTierInputs literal (quant_asym*: false, v_mode_bits: 8) with kv_cache.tier_inputs() so asym, FWHT, HFQ8, and all other KV tiers are dispatched correctly. Thread givens_cos/sin from the cache into AttnParams (asym attend kernels unwrap these), flash_partials from ForwardScratch (required for flash attend tiles), and k_scales/v_scales conditionally for HFQ8 (attend.rs panics on None for that tier). Also use gpu.graphs.capture_mode instead of the hardcoded false. Byte-identical no-op for Q8 caches; prevents panics/garbage when the arch-llama modular forward is wired to asym or HFQ8 KV caches. Deferred item from PR warpfront#463. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
9 GPU-free tier-routing tests covering Q8, asym2/3/4, FWHT-asym4, HFQ4, HFQ8, Q4, and F32. Each constructs the KvTierInputs that tier_inputs() now produces for that cache mode and verifies: - uses_givens is true iff rotation buffers are needed (asym/fwht) - write_key and attend_key select the correct paired kernel tier Validates the dispatch path that arch.rs Site A (hipfire-arch-llama) now exercises via kv_cache.tier_inputs() instead of the hardcoded Q8-shaped literal. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
…d_dim gates Three changes: 1. llama.rs::KvCache::from_mode: add a clean-error gate for Asym3 alongside the existing Asym4 gate. Both require head_dim=256 (validated on Qwen 3.5); at head_dim=128 the constructors assert and the flash-decode paths are untested. Previously asym3 would panic in new_gpu_asym3_capped; now it returns a user-readable HipError. 2. kv_mode.rs::LLAMA_HFQ_POLICY: expand accepted from [Q8] to [Q8, Asym3, Asym4]. Asym2/Fwht* have no Flat KV constructor and silently fall to Q8 (unimplemented, not broken). Truth-table test updated. 3. carrier.rs::load_bundle: pass ctx.kv_mode_override to resolve() instead of hardcoding "". The override was being silently ignored since the carrier was created — explicit --kv-mode requests had no effect on HFQ llama loads. Result: --kv-mode asym3/asym4 on a head_dim=128 HFQ llama model now gives a clean "requires head_dim=256" error instead of either silent Q8 or a constructor panic. At head_dim=256, asym3/asym4 load and run correctly. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
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Rebased onto current master ( Conflict was entirely stale-base noise. The branch forked at 2026-06-21, before the large KV/dispatch churn from the merged speculator-abstraction PR (#477), so it carried duplicate loader/tui changes that now collide. The PR's real work is just 3 commits / 5 files, none of which touch the conflicting files — so I cherry-picked the 3 real commits onto fresh master (all applied cleanly) and dropped the 4 trailing Still needed on master: I confirmed master's Site A is unfixed — Validation (CPU):
Scope caveat: validation is the targeted dispatch/policy unit sweep + byte-identical-Q8 design — I did not run an end-to-end GPU coherence pass with asym KV on a llama-Dir model this round (the path the fix actually enables). Recommend that as the pre-merge gate, since it's the surface my notes previously flagged as panic/garbage-prone. The Q8 default path is byte-identical and unit-confirmed, so the common case carries no regression risk. Now |
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✅ Validated in a local integration stack ( |
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Folded into #534 as a cleanly rebased/cherry-picked delta on |
Summary
Deferred items from PR #463 (transparent loading). Three commits:
1.
fix(arch-llama): unify Site A attention dispatch (arch.rs:242)Llama::forward_scratch_layersinhipfire-arch-llamahad a hardcoded Q8-shapedKvTierInputsliteral (quant_asym*: false,v_mode_bits: 8,givens_cos/sin: None). For asym or HFQ8 KV caches this would either panic or silently select the wrong kernel.Changes in
crates/hipfire-arch-llama/src/arch.rs:..kv_cache.tier_inputs()struct update (all quantization flags now come from cache state)givens_cos/sinfrom the cache intoAttnParams(asym attend kernels unwrap these)flash_partials: Some(&scratch.attn_partials)(required for flash attend tiles)(k_scales, v_scales)for HFQ8 (attend kernel panics onNonefor that tier)gpu.graphs.capture_modeinstead of hardcodedfalseByte-identical no-op for Q8 caches.
2.
test(dispatch-tests): KV-tier dispatch sweep9 GPU-free tier-routing tests in
hipfire-dispatch-tests/src/llama.rscovering Q8, asym2/3/4, FWHT+asym4, HFQ4, HFQ8, Q4, F32. Each verifiesuses_givensand the pairedwrite_key/attend_key.3.
feat(kv-mode): expandLLAMA_HFQ_POLICY+ wirekv_mode_overridekv_mode.rs:LLAMA_HFQ_POLICYnow accepts[Q8, Asym3, Asym4](was[Q8]only). Asym2/Fwht* have no Flat KV constructor and silently fall to Q8.llama.rs::KvCache::from_mode: new clean-error gate for Asym3 alongside the existing Asym4 gate — athead_dim≠256returns a user-readable error instead of panicking innew_gpu_asym3_capped.carrier.rs::load_bundle: was hardcoding""forkv_mode_override, silently ignoring explicit--kv-moderequests for HFQ llama loads since the carrier was introduced. Now passesctx.kv_mode_override.Validated sweep on
qwen3-0.6b-llama.mq4(head_dim=128, gfx1151):--kv-modeq8asym3asym4asym2Test plan
cargo test -p hipfire-dispatch-tests— 9 new tier tests passcargo test -p hipfire-runtime --lib -- kv_mode— truth-table tests passqwen3-0.6b-llama.mq4with--kv-mode q8produces coherent output--kv-mode asym3on head_dim=128 model returns clean load error🤖 Generated with Claude Code