Reproduce IP2312 C4/C5 VBAT and GND rails visually merging

[KrishnaX12]

Summary

• add an isolated reproduction of the IP2312 module's C4/C5 VBAT and GND rails visually merging
• reduce the solver input emitted by krishnax12/ip2312-fast-charging-module v0.1.3 to the two capacitors and their named-net connections
• assert the different-net vertical rail centerlines remain only 0.005 units apart, below the 0.02-unit rendered trace width
• add a focused solver SVG snapshot showing the false visual short

The published circuit originally used @tscircuit/schematic-trace-solver 0.0.173, and the reduced input still reproduces on current main. This PR contains no solver implementation changes.

Source: https://tscircuit.com/krishnax12/ip2312-fast-charging-module#schematic

Verification

• bun test tests/repros/repro-ip2312-near-parallel-capacitor-rails.test.ts
• bun test (404 passed, 4 skipped)
• bunx tsc --noEmit
• bun run build
• bun run format:check

[vercel]

The latest updates on your projects. Learn more about Vercel for GitHub.

Project	Deployment	Actions	Updated
schematic-trace-solver	Ready	Preview	Sep 15, 2026 7:20pm UTC