A list of benchmark suites used in the research related to compilers, program performance, scientific computations etc.

The main LiME code repository

Measurement-Based Probabilistic Timing Analysis framework

Static analyzer for Substrate FRAME's pallets

Synth — WebAssembly-to-native compiler for ARM Cortex-M/R (Thumb-2/A32), RISC-V RV32, and AArch64, with mechanized Rocq correctness proofs, per-compilation translation validation, and sound WCET bounds. Part of the PulseEngine toolchain.

Reference-hardware validation record for AxonOS: raw timing traces, deterministic post-processing, and reproducible L2 evidence artifacts.

Academic-grade Worst-Case Execution Time analysis using LLVM infrastructure for embedded systems and real-time applications

A compiled DSL for real-time robotics. Enforces deadlines, sensor uncertainty, and fallbacks at compile time. Generates Python and C. 38 tests, 3500 lines of Rust.

Semantic-Based Worst Case Execution Time of Loop-Free C Programs using Optimization Modulo Theory

A compiler for system-architecture models — ingests AADL v2.3, SysML v2 & CAN/DBC into one semantic model; emits safety analysis, TSN timing bounds, and verified WASM/Lean/Bazel artifacts. Rust, WASM-native.

Performance benchmarking for deterministic ML inference. Measures latency, throughput, WCET with cryptographic verification of bit-identity across platforms. 11,840 test assertions. Pure C99, no dynamic allocation. Part of the certifiable-* ecosystem for safety-critical AI.

A deterministic systems programming language with compile-time performance contracts for embedded and real-time systems

Stoic-V: a deterministic RV32IM + Zba/Zbb/Zbs + Zicsr (M-mode) RISC-V soft core in SystemVerilog. No caches, speculation, or branch prediction, so timing is operand-independent and WCET is statically analysable. Drop-in replacement for the AMD MicroBlaze-V via the LMB v10 interface; closes 250 MHz on UltraScale+.

Portable, deterministic C++20 control library for industrial autonomy: PID to MPC to adaptive controllers, safety-gated and production-ready.

A cycle-accurate simulation research comparing deterministic execution on the Patmos processor against a conventional speculative CPU, demonstrated through a real-time obstacle avoidance scenario with live WCET, jitter, and deadline analysis.

prototype pipeline that takes a brain-inspired AI model for detecting seizures from EEG data and tries to mathematically prove it will always run fast enough and safely on a tiny medical chip — though it's an honest research demo, not an actual certified medical product.

Embedded Neural Firmware (ENF) - a sealed, offline 'Neural BIOS' for batteryless devices.

The cryptographically proven ML pipeline.