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4 changes: 4 additions & 0 deletions src/axi_burst_splitter.sv
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,9 @@ module axi_burst_splitter #(
parameter int unsigned AddrWidth = 32'd0,
parameter int unsigned DataWidth = 32'd0,
parameter int unsigned IdWidth = 32'd0,
// Number of least-significant ID bits used by the internal demux to track in-flight
// transactions (0 < AxiLookBits <= IdWidth), see doc/axi_demux.md for the trade-off.
parameter int unsigned AxiLookBits = IdWidth,
parameter int unsigned UserWidth = 32'd0,
parameter type axi_req_t = logic,
parameter type axi_resp_t = logic
Expand Down Expand Up @@ -72,6 +75,7 @@ module axi_burst_splitter #(
.AddrWidth ( AddrWidth ),
.DataWidth ( DataWidth ),
.IdWidth ( IdWidth ),
.AxiLookBits ( AxiLookBits ),
.UserWidth ( UserWidth ),
.axi_req_t ( axi_req_t ),
.axi_resp_t ( axi_resp_t ),
Expand Down
9 changes: 8 additions & 1 deletion src/axi_burst_splitter_gran.sv
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,9 @@ module axi_burst_splitter_gran #(
parameter int unsigned AddrWidth = 32'd0,
parameter int unsigned DataWidth = 32'd0,
parameter int unsigned IdWidth = 32'd0,
/// Number of least-significant ID bits used by the internal demux to track in-flight
/// transactions (0 < AxiLookBits <= IdWidth), see doc/axi_demux.md for the trade-off.
parameter int unsigned AxiLookBits = IdWidth,
parameter int unsigned UserWidth = 32'd0,
parameter type axi_req_t = logic,
parameter type axi_resp_t = logic,
Expand Down Expand Up @@ -88,7 +91,7 @@ module axi_burst_splitter_gran #(
.axi_resp_t ( axi_resp_t ),
.NoMstPorts ( 2 ),
.MaxTrans ( MaxTxns ),
.AxiLookBits ( IdWidth )
.AxiLookBits ( AxiLookBits )
) i_demux_supported_vs_unsupported (
.clk_i,
.rst_ni,
Expand Down Expand Up @@ -409,6 +412,10 @@ module axi_burst_splitter_gran #(
else $fatal(1, "AW burst longer than a single beat emitted!");
assert property (@(posedge clk_i) mst_req_o.ar_valid |-> mst_req_o.ar.len <= len_limit_i)
else $fatal(1, "AR burst longer than a single beat emitted!");
initial begin
assume (AxiLookBits > 0 && AxiLookBits <= IdWidth) else
$fatal(1, "AxiLookBits (%0d) must be in ]0, IdWidth (%0d)]!", AxiLookBits, IdWidth);
end
// pragma translate_on
`endif
`endif
Expand Down
5 changes: 4 additions & 1 deletion src/axi_burst_unwrap.sv
Original file line number Diff line number Diff line change
Expand Up @@ -33,6 +33,9 @@ module axi_burst_unwrap #(
parameter int unsigned AddrWidth = 32'd0,
parameter int unsigned DataWidth = 32'd0,
parameter int unsigned IdWidth = 32'd0,
// Number of least-significant ID bits used by the internal demux to track in-flight
// transactions (0 < AxiLookBits <= IdWidth), see doc/axi_demux.md for the trade-off.
parameter int unsigned AxiLookBits = IdWidth,
parameter int unsigned UserWidth = 32'd0,
parameter type axi_req_t = logic,
parameter type axi_resp_t = logic
Expand Down Expand Up @@ -76,7 +79,7 @@ module axi_burst_unwrap #(
.axi_resp_t ( axi_resp_t ),
.NoMstPorts ( 2 ),
.MaxTrans ( MaxTxns ),
.AxiLookBits ( IdWidth ),
.AxiLookBits ( AxiLookBits ),
.SpillAw ( 1'b0 ),
.SpillW ( 1'b0 ),
.SpillB ( 1'b0 ),
Expand Down
10 changes: 10 additions & 0 deletions src/axi_to_axi_lite.sv
Original file line number Diff line number Diff line change
Expand Up @@ -19,6 +19,9 @@ module axi_to_axi_lite #(
parameter int unsigned AxiAddrWidth = 32'd0,
parameter int unsigned AxiDataWidth = 32'd0,
parameter int unsigned AxiIdWidth = 32'd0,
// Number of least-significant ID bits used by the internal demux to track in-flight
// transactions (0 < AxiLookBits <= IdWidth), see doc/axi_demux.md for the trade-off.
parameter int unsigned AxiLookBits = AxiIdWidth,
parameter int unsigned AxiUserWidth = 32'd0,
parameter int unsigned AxiMaxWriteTxns = 32'd0,
parameter int unsigned AxiMaxReadTxns = 32'd0,
Expand Down Expand Up @@ -65,6 +68,7 @@ module axi_to_axi_lite #(
.AddrWidth ( AxiAddrWidth ),
.DataWidth ( AxiDataWidth ),
.IdWidth ( AxiIdWidth ),
.AxiLookBits ( AxiLookBits ),
.UserWidth ( AxiUserWidth ),
.axi_req_t ( full_req_t ),
.axi_resp_t ( full_resp_t )
Expand Down Expand Up @@ -103,6 +107,8 @@ module axi_to_axi_lite #(
assume (AxiIdWidth > 0) else $fatal(1, "AXI ID width has to be > 0");
assume (AxiAddrWidth > 0) else $fatal(1, "AXI address width has to be > 0");
assume (AxiDataWidth > 0) else $fatal(1, "AXI data width has to be > 0");
assume (AxiLookBits > 0 && AxiLookBits <= AxiIdWidth) else
$fatal(1, "AxiLookBits (%0d) must be in ]0, AxiIdWidth (%0d)]!", AxiLookBits, AxiIdWidth);
end
`endif
// pragma translate_on
Expand Down Expand Up @@ -249,6 +255,9 @@ module axi_to_axi_lite_intf #(
parameter int unsigned AXI_ADDR_WIDTH = 32'd0,
parameter int unsigned AXI_DATA_WIDTH = 32'd0,
parameter int unsigned AXI_ID_WIDTH = 32'd0,
/// Number of least-significant ID bits used to track in-flight transactions
/// (0 < AXI_LOOK_BITS <= AXI_ID_WIDTH), see doc/axi_demux.md for the trade-off.
parameter int unsigned AXI_LOOK_BITS = AXI_ID_WIDTH,
parameter int unsigned AXI_USER_WIDTH = 32'd0,
/// Maximum number of outstanding writes.
parameter int unsigned AXI_MAX_WRITE_TXNS = 32'd1,
Expand Down Expand Up @@ -299,6 +308,7 @@ module axi_to_axi_lite_intf #(
.AxiAddrWidth ( AXI_ADDR_WIDTH ),
.AxiDataWidth ( AXI_DATA_WIDTH ),
.AxiIdWidth ( AXI_ID_WIDTH ),
.AxiLookBits ( AXI_LOOK_BITS ),
.AxiUserWidth ( AXI_USER_WIDTH ),
.AxiMaxWriteTxns ( AXI_MAX_WRITE_TXNS ),
.AxiMaxReadTxns ( AXI_MAX_READ_TXNS ),
Expand Down
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