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Operator 2026-09-27 (cop session): "yes, start the kernel registry first, lets build in dedicated worker for aprender".
Why
Recurring kernel-dispatch bugs are data bugs, not speed bugs: LAYOUT-001/002 col-major kernels on row-major data (100+ times), wgpu raw_q4k_weights handing gate_proj out with no qtype check. A registry makes the wrong kernel unloadable.
Scope (phase 1: registry only; no kernel generation)
Ontology: every realizar/trueno kernel as a SHACL-shaped record — op, qtype(s), layout, backend/arch (x86 SIMD, aarch64, CUDA sm_xx, wgpu), shape limits, accumulate precision, tolerance, source fn path, proof/contract link. Reuse ONT-001 / README-ONT tooling; validated by pv, not a script.
Reference rows extracted from llama.cpp (MIT) and vLLM (Apache-2.0): facts only (which qtype/layout/arch pairs they dispatch), with source+commit cited.
Dispatch gate: the realizar kernel selector checks the registry; an unregistered combination returns an error, never a silent fallback. Falsifiers: col-major Q4K on GGUF-row-major → RED; untagged raw_q4k → RED.
Coverage gate: a CI-run test that every dispatchable kernel has a registry row (count derived, not hardcoded).
Done when
Registry + shapes in-tree, pv validate green.
Both falsifiers RED on mutant, GREEN on fix; mutants of the gate killed.
0 dispatchable kernels without a row.
Phase 2 (spec-driven kernel generation: SHACL states the target, a generator writes, parity+bench gate checks) = separate issue after phase 1 lands.
KREG-001 schema requirement from APR-OBS-001 v1.3 §2.10 (filed by OBS-15, #4574)
APR-OBS-001 v1.3 §2.10 makes these acceptance criteria for KREG-001. OBS-15 fills per-row kernel_path = {source: "trace"|"kreg", entries: [{op, kernel_id, qtype, layout, arch, shape_class, precision}]} from the OBS-09 trace until this lands, then from KREG tuple ids. The spec says:
(arch, isa_features, backend) are key dimensions, with no x86- or CUDA-only fields, so 0.73 (aarch64, mini, wgpu) needs no schema migration.
An entry is admitted only with a parity receipt from a host of that arch.
Rejected alternative (§0): registering aarch64 or macOS entries before a parity receipt exists on that host. "Registered" must imply "verified".
Acceptance criteria
AC-1 (key): the admission key includes arch, isa_features and backend, so two rows that differ only in arch or ISA features are distinct keys. admit() matches on them.
AC-2 (arch-generic): no field or enum is valid for only one of x86 or CUDA. An aarch64 NEON/SVE row, a Metal row and a wgpu row must all validate under pv validate with no schema change.
AC-3 (receipt-gated admission): a row without a parity receipt from a host of the row's arch is a shape violation. This covers admission as well as tolerance, and the receipt's host arch must equal the row's arch.
AC-4 (stable id for kernel_path): every row has a stable kernel_id, which OBS-15 records as kernel_path.entries[].kernel_id, plus a shape_class and precision that the nightly can report.
Falsifiers (apr-kernel-path-v1, spec §3; each must turn RED)
A KREG entry for an arch with no host receipt is admitted.
A GPU ledger row after the OBS-09 merge has kernel_path: null.
Positive specimen: a gx10 row that names its kernels stays GREEN.
Delta against kreg/4539-survey @74d1042e3b (read-only; aprender-85 owns it)
The admission formula is admit(b, op, q, l), keyed on (backend, op, qtype, layout). arch is a row field but not part of the key → AC-1 open.
There is no isa_features dimension. The arch pattern ^(any|x86_64-…|aarch64-…|sm_[0-9]+)$ is arch-generic, which is good for AC-2, but any plus the missing ISA features cannot separate AVX2 from AVX-512, or NEON from SVE.
FALSIFY-KREG-003 receipt-gates the tolerance, but a row is admitted with tolerance: unmeasured and no receipt → AC-3 open.
merged into #5312 (master ticket for epic #3994; triage rule 7b, 2026-10-14). It is a checklist row there; reopen this issue when work on it starts or its PR opens.
Activity
noahgift commentedon Sep 27, 2026
KREG-001 schema requirement from APR-OBS-001 v1.3 §2.10 (filed by OBS-15, #4574)
APR-OBS-001 v1.3 §2.10 makes these acceptance criteria for KREG-001. OBS-15 fills per-row
kernel_path = {source: "trace"|"kreg", entries: [{op, kernel_id, qtype, layout, arch, shape_class, precision}]}from the OBS-09 trace until this lands, then from KREG tuple ids. The spec says:Rejected alternative (§0): registering aarch64 or macOS entries before a parity receipt exists on that host. "Registered" must imply "verified".
Acceptance criteria
arch,isa_featuresandbackend, so two rows that differ only in arch or ISA features are distinct keys.admit()matches on them.pv validatewith no schema change.archis a shape violation. This covers admission as well as tolerance, and the receipt's host arch must equal the row'sarch.kernel_path): every row has a stablekernel_id, which OBS-15 records askernel_path.entries[].kernel_id, plus ashape_classandprecisionthat the nightly can report.Falsifiers (
apr-kernel-path-v1, spec §3; each must turn RED)kernel_path: null.Delta against
kreg/4539-survey@74d1042e3b (read-only; aprender-85 owns it)admit(b, op, q, l), keyed on(backend, op, qtype, layout).archis a row field but not part of the key → AC-1 open.isa_featuresdimension. Thearchpattern^(any|x86_64-…|aarch64-…|sm_[0-9]+)$is arch-generic, which is good for AC-2, butanyplus the missing ISA features cannot separate AVX2 from AVX-512, or NEON from SVE.tolerance: unmeasuredand no receipt → AC-3 open.feat(kreg): CUDA loads only registered kernels — from_ggml_type consu…
KREG-001: key admission on (backend, arch, isa_features, qtype, layou…
KREG-001: wgpu raw_q4k_weights admits only registered Q4_K — gate_pro…
KREG-001: upstream reference rows (llama.cpp MIT / vLLM Apache-2.0, f…
KREG-001 AC-3: receipt-gated admission as a ratchet, hard RED at 0.73…
KREG-001 step 5: CPU coverage — cpu rows equal the types fused_matmul…
test(kreg): the KREG case table runs in CI, on the real contract and …
docs(roadmap): PMAT-4539 records the issue's AC-1..4 and the AC-3 rat…
audit(quorum): PMAT-4539 AGREED 3/3 PASS (sonnet-5, gemini-3.1-pro-hi…
wip(kreg): parity harness covers cpu.matvec.q4_0/q8_0 with a quantize…
69 remaining items
chore(kreg): the dequant-only and IQ cpu rows stay unmeasured until a…
chore(kreg): regenerate contracts.nt for the unmeasured dequant-only …
test(kreg): the oracle scan finds a splice broken across lines and th…
test(kreg): the splice line map counts bytes, shown on multibyte text…
fix(ledger): re-point the two pv ontology rows after the ReleaseArgs …
feat(kreg): CPU kernel registry parity receipts, forced-ISA coverage,…
noahgift commentedon Oct 14, 2026
merged into #5312 (master ticket for epic #3994; triage rule 7b, 2026-10-14). It is a checklist row there; reopen this issue when work on it starts or its PR opens.
noahgift commentedon Oct 14, 2026
Moved: this sub-ticket is now a row in #5323 (CUDA quantized kernels: correct block layouts, cache keys and precision), split out of #5312 by theme.