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effective-config reports Qwen3.5 CUDA residency as 'cpu residency' and drops the F2 parity verdict (v0.69.3) #4374

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Description

@noahgift

GET /v1/effective-config misreports a CUDA-resident Qwen3.5 model as CPU-resident (v0.69.3, gx10).

Observed (gx10-a5b5, apr-review-serve from infra e872544c, apr v0.69.3 binary sha 2f274f47…, Qwen3.5-4B-Q4_K_M sha 00fe7986…, 2026-09-25 ~10:14Z):

  • The journal says Backend: GPU (CUDA, NVIDIA GB10 …) [qwen35 hybrid forward, #3090], 32 layers resident on the GPU, gpu-layers … (backend=cuda), and an F2 guard receipt match.
  • /health says compute_mode: "gpu".
  • /v1/effective-config says parity: {status: "not-run", cosine: null, basis: "no GPU model loaded (cpu residency)"}, backend_loaded: [], cuda: null, compute_class: "unknown".

Why it matters: effective-config is the provenance envelope (REG-15 / #2971 wire shape). A reader who trusts it concludes the model runs on CPU. It also discards the F2 verdict, so no endpoint exposes the parity result of the qwen35 path. PROMETHEUS (#4354) REX-04 cannot admit cell C4 from the serve's own envelope.

Expected: for the qwen35 hybrid CUDA path, backend_loaded and cuda are populated. parity carries the F2 outcome (source fresh/receipt, positions_judged, and the measured cosine/argmax agreement if one exists).

Refs #4354 #4359

Activity

  1. added this to the backlog milestone on Sep 25, 2026
  2. noahgift commented on Sep 25, 2026

    @noahgift
    MemberAuthor

    Fix on branch fix/4374-effective-config-qwen35 @ 4ec849e (no PR: 10-PR cap, to be folded into B3). A Qwen3.5 serve now reports backend_loaded/compute_class from the session (cuda|cpu), and parity carries the F2 guard's record: status PASS/FAIL/not-run, min real-position cosine, positions, source=fresh|receipt. A receipt hit reports PASS with cosine null, so C4's cosine receipt needs a serve started with APR_F2_REVALIDATE=1. Tests: 6/6 pass (5 pure, plus a CPU test backed by the 0.8B GGUF), and CUDA lib clippy and the test-profile check are clean. The GPU falsifier is compiled but NOT run (this worker does no lambda 4090 work). It needs a gx10 run through the declared executor (infra#1088). Unrelated breakage on main: tests/driver_cuda_gguf.rs does not compile with --features cuda (missing query_pre_attn_scalar / post_*_norm_weight).

  3. added
    P0Critical priority
    owner:la-0.71Owned by the 0.71 look-ahead slot
    on Oct 4, 2026
  4. added
    P2Medium priority
    and removed
    P0Critical priority
    on Oct 14, 2026
  5. noahgift commented on Oct 14, 2026

    @noahgift
    MemberAuthor

    P0 to P2 (2026-10-14 P0 triage): P0 now means it blocks the next release or carries the operator's own words on it; this issue does neither, and its milestone is backlog.

  6. noahgift commented on Oct 14, 2026

    @noahgift
    MemberAuthor

    merged into #5312 (master ticket for epic #3994; triage rule 7b, 2026-10-14). It is a checklist row there; reopen this issue when work on it starts or its PR opens.

  7. noahgift commented on Oct 14, 2026

    @noahgift
    MemberAuthor

    Moved: this sub-ticket is now a row in #5325 (apr on GPU: refuse by name before OOM, never fall back to CPU silently), split out of #5312 by theme.

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