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Enable PREFETCH_L1 for RISC-V to improve performance - #4643

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Enable PREFETCH_L1 for RISC-V to improve performance#4643
Polaris-911 wants to merge 1 commit into
meta:devfrom
Polaris-911:yuqu

Enable PREFETCH_L1 for RISC-V to improve performance

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Cirrus CI / FreeBSD (make check) succeeded Apr 15, 2026 in 3m 37s

Task Summary

Task successfully finished!

Details

✅ 00:13 clone
✅ 00:01 install
✅ 03:20 main

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