Skip to content

[PW_SID:1139870] clk: spacemit: fix PLL init and add K3 1.8 GHz rates - #2409

Open
linux-riscv-bot wants to merge 3 commits into
workflow__riscv__fixesfrom
pw1139870
Open

[PW_SID:1139870] clk: spacemit: fix PLL init and add K3 1.8 GHz rates#2409
linux-riscv-bot wants to merge 3 commits into
workflow__riscv__fixesfrom
pw1139870

Conversation

@linux-riscv-bot

Copy link
Copy Markdown

PR for series 1139870 applied to workflow__riscv__fixes

Name: clk: spacemit: fix PLL init and add K3 1.8 GHz rates
URL: https://patchwork.kernel.org/project/linux-riscv/list/?series=1139870
Version: 1

Linux RISC-V bot and others added 3 commits August 4, 2026 02:48
The PLL and PLLA init callbacks gate off and reprogram a PLL when its
firmware configuration is absent from the rate table. However, they
leave the PLL gated off after updating the registers.

Re-enable the PLL to complete the sequence and propagate any lock
timeout to clock registration.

Fixes: 1b72c59 ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Fixes: 3a08623 ("clk: spacemit: ccu_pll: add plla type clock")
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
The K3 SoC may not remain stable when its A100 CPU clusters operate
persistently at 2 GHz. Updated U-Boot firmware therefore configures
their C2 and C3 clock domains at 1.8 GHz during early initialization.
PLL5 feeds C2 and PLL8 feeds C3, but 2 GHz is currently the only entry
in both rate tables.

Add 1.8 GHz as the first entry in the PLL5 and PLL8 rate tables,
switching the driver default from 2 GHz to 1.8 GHz.

Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Signed-off-by: Linux RISC-V bot <linux.riscv.bot@gmail.com>
@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 118.23 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1142.33 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1428.61 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 19.80 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.36 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.63 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 79.10 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.22 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
kdoc
Desc: Detects for kdoc errors
Duration: 0.68 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
module-param
Desc: Detect module_param changes
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.26 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 1: "[1/2] clk: spacemit: re-enable PLLs after init"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.25 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
build-rv32-defconfig
Desc: Builds riscv32 defconfig
Duration: 117.59 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
build-rv64-clang-allmodconfig
Desc: Builds riscv64 allmodconfig with Clang, and checks for errors and added warnings
Duration: 1127.77 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
build-rv64-gcc-allmodconfig
Desc: Builds riscv64 allmodconfig with GCC, and checks for errors and added warnings
Duration: 1432.31 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
build-rv64-nommu-k210-defconfig
Desc: Builds riscv64 defconfig with NOMMU for K210
Duration: 19.80 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
build-rv64-nommu-k210-virt
Desc: Builds riscv64 defconfig with NOMMU for the virt platform
Duration: 21.60 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
checkpatch
Desc: Runs checkpatch.pl on the patch
Duration: 0.58 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
dtb-warn-rv64
Desc: Checks for Device Tree warnings/errors
Duration: 77.81 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
header-inline
Desc: Detects static functions without inline keyword in header files
Duration: 0.22 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
kdoc
Desc: Detects for kdoc errors
Duration: 0.68 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
module-param
Desc: Detect module_param changes
Duration: 0.23 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
verify-fixes
Desc: Verifies that the Fixes: tags exist
Duration: 0.21 seconds
Result: PASS

@linux-riscv-bot

Copy link
Copy Markdown
Author

Patch 2: "[2/2] clk: spacemit: k3: add 1.8 GHz PLL5 and PLL8 rates"
verify-signedoff
Desc: Verifies that Signed-off-by: tags are correct
Duration: 0.25 seconds
Result: PASS

@linux-riscv-bot
linux-riscv-bot force-pushed the workflow__riscv__fixes branch 2 times, most recently from abf8962 to 9fa746d Compare August 8, 2026 18:30
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants