E01: calibrate CUDA, wall-clock, and end-to-end timing boundaries #6

Parent

• Formal evidence program: execute E01–E30 by dependency and evidence level #5

What to deliver

A formal timer-calibration block that establishes which timing boundary EdgeFlow may use for engine-only and end-to-end measurements.

Blocked by

• PR Establish EdgeFlow engineering and experiment governance #4 must merge.

Hypothesis

CUDA Events and synchronized monotonic wall time should preserve workload ordering when placed correctly, while unsynchronized wall time should systematically under-measure asynchronous GPU work.

Procedure

• CPU sleep control.
• CUDA vector operation.
• Small GEMM.
• Timer modes: CUDA Event, perf_counter_ns with before+after synchronization, after-only synchronization, no synchronization.
• 1,000 iterations per condition.
• Record timer overhead separately.
• Treat the no-sync path as a negative control, not a candidate timing method.

Required artifacts

• timer_calibration.json
• immutable raw iteration rows
• environment fingerprint
• protocol and exact commands
• selected timing-boundary policy
• validation report

Acceptance criteria

• Unsynchronized GPU timing is demonstrated to be biased or is otherwise formally rejected with evidence.
• Engine-only and end-to-end boundaries are explicitly named and cannot be mixed.
• Selected timers have quantified overhead and stable ordering.
• A focused regression fixture fails when synchronization/timing code is intentionally broken.
• Timing code changes are documented to trigger E01 revalidation.
• Raw rows and the derived report are reproducible.

Permitted claim after completion

EdgeFlow's chosen timing boundaries are calibrated for the pinned RTX 4080 SUPER environment and the tested operation classes.

Prohibited claim

This experiment does not prove any runtime or model is faster.