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fix(bug): soundness and constraints for formal verification
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#101
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eason1981
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fix(bug): soundness and constraints for formal verification
#101
eason1981
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brevis-network/pico:main
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formal-verification-fixes
brevis-network/pico:formal-verification-fixes
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Commits on May 20, 2026
fix(alu): address Nethermind soundness bugs in LT, SR, SLL constraints
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fix(cpu): enforce JALR bit-0 clearing in constraints and trace
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Commits on May 21, 2026
fix(alu): enforce remainder < divisor in divrem constraints
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Commits on May 22, 2026
fix(alu): bind quot_msb to quotient bit-31 in divrem word constraints
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fix(alu): enforce sign/zero extension of c upper limbs in divrem word constraints
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fix(alu): enforce sign/zero extension of b upper limbs in divrem word constraints
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Commits on May 31, 2026
fix(alu): close two soundness gaps in ShiftRight chip constraints
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Commits on Jun 4, 2026
fix(memory): remove addr_aligned free witness, compute inline in eval_memory_access
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fix(memory): pin op_a to zero when rd = x0 in load instructions
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fix(memory): range-check high byte of selected_limb for LB/LBU
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refactor(memory): replace op_b_access/op_c_access MemoryReadCols with Word
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Commits on Jun 5, 2026
Revert "fix(memory): pin op_a to zero when rd = x0 in load instructions"
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