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Perf/kernel optimizations - #1
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… with 2D spatial grid
…hared-memory paths
…rds, and tree reduce mean
…ecialized *.wgsl.ts submodules
…oisted base addresses
…, mm, bmm, and elementwise ops
…ation headers to custom shaders
… add complete FP16 WGSL kernel variants
…ith auto-reporting
… selfie-segmentation FP16
…conventions, and alignment rules
…uite for direct GPU comparison
… tiling - Upgrade mm, bmm, conv2d and conv-with-clamp 64x64 kernels to 256-thread (16x16) workgroups - Reduce per-thread accumulators from 64 floats to 16 floats (4 vec4s) to eliminate register spilling and maximize GPU occupancy - Adopt 100% coalesced 128-bit memory transactions with zero inner-loop divisions/modulos - Add dedicated FP16 1x1 tile64 compute shaders for convolution and conv_with_clamp - Benchmarked on real GPU: DepthART at 2.69x, YOLO26-N at 2.0x, Conv3x3 at 2.66x speedup
…e64 kernels - Eliminate 8 integer divisions and 8 modulos per thread from the inner tile loop - Achieves 3.35x speedup on ConvWithClamp 3x3 (0.170ms) and 2.63x on Conv2D 3x3 (0.230ms) - Push YOLO26-N to 2.10x and DepthART to 2.30x speedup on real GPU
… convolution kernels
…hardware execution
…and optimized operator benchmarks
…l register tiling for depthwise convs
…/max) and inline rendering
…it compute flat copy
…3x3 depthwise convs
Rebalance the final decoder convolutions before half conversion, add photographic-range regression coverage, and specialize single-channel pointwise convolution with FP32 accumulation. Replace the example precision dropdown with an accessible sliding switch and record Chrome benchmark evidence.
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