Flash Next CUDA on GB10: a short series of byte-identical PRs #1762

Tracking issue for Flash Next CUDA changes on one GB10, as discussed: byte-identical PRs first, a few at a time; same-precision reorders later, under the #1353 gate.

Each PR carries its own receipt against main: replies equal to main (greedy and seeded sampled, drafted and "draft": false, 1 / 4 / 16 streams, resumed and fresh), bench_openai and bench_concurrent, cold prefill on exact token arrays, at default settings and with TF_FLASHNEXT_CHUNK=8192 TF_FLASHNEXT_DRAFT_HEAD=affine4, the host suite and the kernel contract's SUMMARY. One GB10 with nvidia/Qwen3.8-Flash-Next-FP4-Local; TP2 untested: with tensor parallelism every change keeps today's path.

Plan

• Decode with several streams: pending DeltaNet rows, reused lane buffers, the shared expert on a side stream.
• Prefill: BF16 prompt tile, writeback and normalize in one launch, one-slice native request, router grid, key select, DeltaNet prompt kernel, prompt scratch sized by use.
• Draft round: first token before drafts, n-gram table read-ahead, draft stop rule, greedy depth 8, sampled draws on the GPU, verify scores on the device, window graphs.
• Prompt-cache marks kept inside the pass.
• Later, under nemotron CUDA: RMSNorm rows run on the shared norms and combine (#548, step 1) #1353: MXFP8 prompt tile, FMA in the DeltaNet chain, indexer scores on tensor cores (same precision, order or fusion only). The MXFP8 head and bf16 MoE slot rows lower a precision and are not proposed.

One launch for all streams' attention and DeltaNet steps is #1737 (#1739, #1740) and stays there. The pending DeltaNet rows in the first PR change the same chain, so we'll check the two together when #1740 is ready, and we're glad to review it.