Skip to content

XUANTIE-RV/xtsis-nn

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

5 Commits
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

xtsis-nn

xtsis-nn software library is a collection of efficient neural network kernels developed to maximize the performance and minimize the memory footprint of neural networks on XuanTie processors.

Documentation

  • Architecture — Architecture, module organization, DSP optimization strategy, build system, and test framework
  • API Reference — Complete public type definitions and function API reference

Supported Framework

The library follows the int8 and int16 quantization specification of TensorFlow Lite for Microcontrollers.

Architecture Support

Implementation Path Description
Pure C Generic implementation for all RISC-V processors
RISC-V P Extension DSP Optimized for processors with P extension (zpn v0.9.4), auto-enabled via RISCV_MATH_DSP macro

Operator Support

Operator C int8 C int16 C int4* DSP int8 DSP int16 DSP int4*
Conv2D Yes Yes Yes Yes Yes Yes
DepthwiseConv2D Yes Yes Yes Yes Yes Yes
TransposeConv2D Yes No No Yes No No
GroupedConv2D Yes No No No No No
Fully Connected Yes Yes Yes Yes Yes Yes
Batch Matmul Yes Yes No Yes Yes No
Add Yes Yes N/A Yes Yes N/A
Mul Yes Yes N/A Yes Yes N/A
Minimum Yes No N/A Yes No N/A
Maximum Yes No N/A Yes No N/A
MaxPooling Yes Yes N/A No Yes N/A
AvgPooling Yes Yes N/A Yes Yes N/A
Softmax Yes Yes N/A Yes No N/A
Activation Yes Yes N/A Yes Yes N/A
LSTM Yes Yes No Yes Yes No
SVDF Yes No No Yes No No
Pad Yes No N/A No No N/A
Reshape Yes No N/A No No N/A
Transpose Yes No N/A No No N/A
Concatenation Yes No N/A No No N/A

* int4 weights + int8 activations

Getting Started

Prerequisites

  • RISC-V GCC toolchain (with Xuantie e907 / P extension support)
  • CMake >= 3.15

Building the Library

Using the bare-metal toolchain (riscv64-unknown-elf-gcc) for RTOS integration:

# Configure
cmake -S . -B build \
  -DCMAKE_SYSTEM_NAME=Generic \
  -DCMAKE_TRY_COMPILE_TARGET_TYPE=STATIC_LIBRARY \
  -DCMAKE_C_COMPILER=riscv64-unknown-elf-gcc \
  -DCMAKE_C_FLAGS="-mcpu=e907fdp -mabi=ilp32"
# Build
cmake --build build

The output libxtsis-nn.a can be linked into your RTOS project.

Testing

Note: Unit tests use QEMU user-mode emulation for functional verification, providing a convenient way to validate correctness without hardware. Although the bare-metal toolchain (riscv64-unknown-elf-gcc) is used for compilation, test executables are statically linked with newlib's Linux syscall stubs and run directly under qemu-riscv32 user-mode (not QEMU system-mode). This approach avoids the need for linker scripts, startup code, and UART drivers, making it easy to verify operator correctness in any development environment. The test binaries are not RTOS-style bare-metal ELFs — they behave like Linux executables solely for the purpose of functional verification. The xtsis-nn library itself has no OS dependency and can be linked into any RTOS or bare-metal project.

Additional Prerequisites for Testing

  • QEMU (riscv32, with e907fdp cpu model)
  • Python 3 (for generating test runners)

Running All Unit Tests

# 1. Configure
cmake -S Tests/UnitTest -B build-test \
  -DBUILD_XTSIS_NN_UNIT=ON \
  -DXTSIS_NN_PATH=$(pwd) \
  -DCMAKE_SYSTEM_NAME=Generic \
  -DCMAKE_TRY_COMPILE_TARGET_TYPE=STATIC_LIBRARY \
  -DCMAKE_C_COMPILER=riscv64-unknown-elf-gcc \
  -DCMAKE_CXX_COMPILER=riscv64-unknown-elf-g++ \
  -DCMAKE_C_FLAGS="-mcpu=e907fdp -mabi=ilp32 -static" \
  -DCMAKE_CXX_FLAGS="-mcpu=e907fdp -mabi=ilp32 -static" \
  -DCMAKE_CROSSCOMPILING_EMULATOR="qemu-riscv32;-cpu;e907fdp" \
  -DCMAKE_POLICY_VERSION_MINIMUM=3.5
# 2. Build all tests
cmake --build build-test --target xtsis_nn_unit_tests
# 3. Run all tests
ctest --test-dir build-test --output-on-failure

DSP Optimization Details

When the compiler targets a RISC-V processor with P extension support (__riscv + one of __riscv_dsp / __riscv_p / __riscv_zpn), the RISCV_MATH_DSP macro is automatically defined in Include/riscv_nn_math_types.h, enabling P extension DSP instruction acceleration:

DSP Instruction Purpose Wrapper Macro
kmada Dual 16-bit multiply-accumulate SMLAD
smbb16 / smtt16 16-bit half-word multiply SMULBB / SMULTT
kmabb / kmatt 16-bit multiply-accumulate (single half-word) SMLABB / SMLATT
smaqa Signed int8×4 quad multiply-accumulate SMAQA
smaqa.su Signed×Unsigned int8×4 quad MAC SMAQA_SU
kwmmul.u Saturating doubling high-word multiply KWMMUL_U
sunpkd820 Sign-extend byte to half-word (byte0, byte2) SXTB16
sunpkd810 Sign-extend byte to half-word (byte0, byte1) SUNPKD810
zunpkd810 Zero-extend byte to half-word ZUNPKD810
add16 Parallel 16-bit addition SADD16
pkbb16 / pkbt16 / pktt16 / pktb16 Half-word packing PKHBT / PKHTB
kaddw Saturating addition QADD
smax8 / smin8 Parallel byte-level max/min SMAX8 / SMIN8
smax16 / smin16 Parallel 16-bit max/min SMAX16 / SMIN16

Unit Test Guide

The test framework is based on Unity. Test cases are located under Tests/UnitTest/TestCases/, with each operator having a corresponding test_riscv_* directory.

About

No description, website, or topics provided.

Resources

License

Stars

2 stars

Watchers

0 watching

Forks

Packages

 
 
 

Contributors

Languages