feat(topic28): extend RISC-V instruction selection and f64 support by ForsakenDelusion · Pull Request #85 · ScratchV-Compiler/ScratchV

ForsakenDelusion · 2026-09-28T15:24:18Z

Summary

DSL / ONNX 标量 i32、f32、f64
  → 保留类型的 IR 和优化
  → RV32IM / F / D 指令选择
  → 整数或浮点寄存器、4/8 字节保存、每函数栈空间
  → 合法汇编、独立调用者、QEMU 执行

增加除法、余数、平方根、min/max、符号操作、访存及比较分支，提供四个 DSL 示例、支持列表和使用说明。R1–R4 的 LLVM 失败处理、函数内部重名、常量编码和分配器复用问题已修复。后续 R5 也已修复：ONNX 浮点 Min/Max 在任意输入为 NaN 时返回 NaN，IR 执行器同步处理，DSL 保持既有规则。

合并最新 main 时还修复了张量形状契约和循环基准回归：未知 ONNX 输出维度不再写成精确的零长度尺寸（真实 dim_value=0 仍保留），循环上界改为按需物化并使用有符号立即数比较，DSL 基准显式初始化累加器。

Review 报告与修复记录

Evidence

Before: 在 e061861 的生产代码上，新 NaN 专项测试为 156 失败、60 通过；加上纠正 ONNX 预期后的 96 项既有编码测试，共 216 失败、96 通过。
After: 新增 216 项专项测试通过，既有编码测试继续检查位模式、ABI 和异常标志；R5 修复后的完整回归为 3826 passed，0 failed，0 skipped。
8 个 NaN 场景的 ONNX 官方参考实现、ONNX Runtime 1.30.0 和 QEMU 执行结果一致。
Before: 合入上游张量管线后，未知维度被当成精确零长度尺寸，Qwen 两层模型验收报 reshape 形状不匹配，主测试与 W1/W2 部署验收同时失败。
After: 未知维度保持未知，真实零长度维度仍可执行；新增动态维度、真实零维和分支执行回归，Qwen 两层模型 7 组输入、29 个检查点、6 项不变量全部通过。
Before: Topic 06 循环组 3 项中 2 项超出成本门槛；DSL 基准 23 项中 3 个循环用例失败。
After: Topic 06 循环组 3/3、DSL 基准 23/23 通过，成本门槛未放宽。
当前全量回归：6658 passed，2 skipped（需要 qemu-system-riscv64 的用例、Windows 专属用例）。
使用 Clang/LLD 与 QEMU 汇编、链接、执行；CNN standalone 调度与执行基准通过；git diff --check 通过。远端 Actions 结果以实际运行记录为准。
evidence 和 repro 文件只保留在本地，不纳入提交。

Merge Danger

Door: two-way

代码和配置可通过回退提交恢复。

Blast Radius: 编译管线

影响共享前端、IR 优化、RISC-V 选择与分配、栈布局及部分基准工具。范围为 RV32 标量和硬件 F/D；内部 encoder/emulator 仍仅支持 RV32IM。

ONNX Min/Max 的 NaN 传播问题已修复。非 NaN 输入继续采用已记录的 RISC-V 符号零规则；本次验证不扩大为完整 ONNX 张量或所有浮点边界的支持承诺。

github-actions · 2026-09-28T15:25:36Z

🤖 AI Code Review

Head: 96be4aa
PR files: 98; fetched: 98; reviewed: 89; failed/missing: 9; unreviewable: 0.
Coverage: INCOMPLETE. A completed AI response is not approval or proof of correctness.

Full per-file results and batch artifacts

Files without a review

"scratchv/backend/abi_frame.py": failed — No usable API result (TimeoutError).
"scratchv/backend/inst_select_ext.py": failed — No usable API result (TimeoutError).
"scratchv/backend/instruction_select.py": failed — No usable API result (TimeoutError).
"scratchv/backend/register_alloc.py": failed — No usable API result (TimeoutError).
"scratchv/frontend/onnx_bits.py": failed — No usable API result (TimeoutError).
"tests/test_topic28_backend_float.py": failed — No usable API result (TimeoutError).
"tests/test_topic28_calling_convention.py": failed — No usable API result (TimeoutError).
"tests/test_topic28_frontend_oracles.py": failed — No usable API result (TimeoutError).
"tests/test_topic28_wire_section_layout.py": failed — No usable API result (TimeoutError).

Copilot

Copilot review overview

🔵 Needs a closer look

The design contains unresolved type-validation and floating-point spill/reload issues, plus configuration and ordering ambiguities.

Review effort: Lite
Findings: None

What changed in this PR

Adds a technical design for Topic 28 instruction selection and links it from the topic page.

Changes:

Defines typed IR, integer/F/D floating-point lowering, register allocation, ABI, and constant folding.
Adds CLI integration, testing, acceptance criteria, and phased implementation planning.
Links the new design document from the topic page.

File	Summary
`docs/topics/28-扩展指令选择/28-扩展指令选择.md`	Adds the design document link.
`docs/topics/28-扩展指令选择/28-扩展指令选择-设计文档.md`	Adds the comprehensive instruction-selection design. Findings: unknown ONNX types must fail instead of silently becoming `FLOAT32` (critical, 1 vote); FPR spill/reload needs value-width/type propagation (moderate, 1 vote); `rounding_mode` requires validation (moderate, 1 vote); candidate priority direction should be defined (nit, 1 vote).

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ForsakenDelusion · 2026-10-01T10:16:24Z

@copilot code review

Add independent-function regressions and expand LLVM integer input rejection tests, recording before/after validation in the review report.

Decode constant storage bits consistently at load and operand boundaries, preserving instruction-only encodings within each function. Add bit-level regression tests and document before/after validation.

Explain the findings and fixes in plain language, mark all four issues as resolved, and retain reproduction examples and validation results.

Resolve IR, ONNX frontend, optimizer, and CI conflicts while preserving both checked tensor semantics and RV32 scalar behavior. Keep floating-point encodings consistent across execution, folding, and Qwen audits. Validation: 6519 tests passed and 9 skipped in the core regression run; 20 W3 subgraph tests passed separately. Added 12 merge integration regressions. Optional Torch exporter validation requires the upstream pinned environment.

Unknown ONNX output dimensions were recorded as exact zero-sized tensor shapes after the merge, causing valid Qwen Reshape results to fail runtime checks. Preserve unknown tensor outputs without those scalar rejection sentinels, while retaining real zero dimensions and scalar backend checks. Initialize DSL benchmark accumulators with syntax shared by the baseline parser, and propagate simulator errors even without an expected-output file. Materialize loop bounds at their use, select signed immediate comparisons, and retain greedy mappings only across unique adjacent fallthrough edges. This removes redundant spills/reloads without relaxing Topic 06 cost gates. Add regression coverage for dynamic shapes, genuine zero extents, benchmark failure reporting, signed comparison boundaries and branch joins. Validation: 6623 pytest tests passed, 2 platform/tool skips; 113 Qwen probe regressions passed; fresh two-layer Qwen export passed all 7 input cases, 29 checkpoints and 6 invariants. DSL corpus: 23/23. Topic 06 required gates: activation 4/4, elementwise 5/5, loop 3/3. Baseline DSL comparison and real CNN scheduling/execution benchmark passed. The local L2 harness is absent.

- Drop opaque t/g/r/n review-round prefixes from 90 test functions. - Rename round-named modules to domain names (review/stage files). - Share independent ONNX wire helpers via tests/topic28_onnx.py. - Keep allocator sweeps only where allocation affects the contract; semantic/bit-pattern matrices use one representative allocator. - Update delivery/review doc links and project memory.

- Remove test_topic28_ci_regressions.py: ONNX shape inference, benchmark failure reporting, topic06 cost gate, base slti encoder/emulator parity and greedy fallthrough belong to shared tests, not this topic. - Drop the Qwen/W2 audit check from the merge suite. - Rename the remainder to test_topic28_encoded_constants.py and name its tests by contract.

Preserve upstream static ONNX input validation alongside scalar constant fidelity. Initialize named bindings for both base and extended selectors, and cover the integration with actual RV32 execution.

docs(topic28): add instruction selection design

d0147a3

Copilot AI lite review requested due to automatic review settings September 28, 2026 15:24

Copilot started reviewing on behalf of ForsakenDelusion September 28, 2026 15:24

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Copilot AI reviewed Sep 28, 2026

View reviewed changes

docs(topic28): consolidate phased implementation plan

9b4b2a3

docs(topic28): specify API-level instruction selection design

3a681f4

ForsakenDelusion changed the title ~~docs(topic28): add instruction selection design~~ docs(topic28): specify instruction selection design and APIs Oct 11, 2026

feat(topic28): add RISC-V operators and float64 support

2dc976c

ForsakenDelusion changed the title ~~docs(topic28): specify instruction selection design and APIs~~ feat(topic28): extend RISC-V instruction selection and f64 support Oct 11, 2026

ForsakenDelusion closed this Oct 11, 2026

ForsakenDelusion reopened this Oct 11, 2026

ForsakenDelusion added 5 commits October 12, 2026 17:51

fix(llvm): reject unsupported integer lowering

492bcfb

fix(riscv): preserve function-local value identities

814dc9e

Add independent-function regressions and expand LLVM integer input rejection tests, recording before/after validation in the review report.

fix(simulator): honor encoded floating-point constants

9d08814

Decode constant storage bits consistently at load and operand boundaries, preserving instruction-only encodings within each function. Add bit-level regression tests and document before/after validation.

fix(regalloc): reset output before empty rewrites

701cdc5

docs(topic28): conclude R1-R4 review

e061861

Explain the findings and fixes in plain language, mark all four issues as resolved, and retain reproduction examples and validation results.

ForsakenDelusion force-pushed the docs/topic28-design branch 2 times, most recently from 7217607 to a4e37ba Compare October 19, 2026 17:24

ForsakenDelusion added 5 commits October 20, 2026 01:28

fix: preserve NaN propagation in ONNX Min and Max

ac70bb3

fix: emit exact LLVM floating-point constants

3740e85

test: organize Topic 28 regressions into pytest classes

86c6b81

ForsakenDelusion force-pushed the docs/topic28-design branch 2 times, most recently from 7bb4887 to 1252b37 Compare October 19, 2026 17:38

ForsakenDelusion added 2 commits October 22, 2026 23:09

ForsakenDelusion force-pushed the docs/topic28-design branch from 776d9fb to 179fff6 Compare October 22, 2026 15:10

Merge origin/main and reconcile Topic 28 bindings

96be4aa

Preserve upstream static ONNX input validation alongside scalar constant fidelity. Initialize named bindings for both base and extended selectors, and cover the integration with actual RV32 execution.

jizhenjun approved these changes Oct 23, 2026

View reviewed changes

jizhenjun merged commit aa25b99 into ScratchV-Compiler:main Oct 24, 2026
22 of 29 checks passed

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feat(topic28): extend RISC-V instruction selection and f64 support - #85

feat(topic28): extend RISC-V instruction selection and f64 support#85
jizhenjun merged 17 commits into
ScratchV-Compiler:mainfrom
ForsakenDelusion:docs/topic28-design

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