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[rocjitsu] Model GFX9/CDNA buffer range checking - #10928

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[rocjitsu] Model GFX9/CDNA buffer range checking#10928
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feikou:rocjitsu-gfx9-buffer-range-check

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@feikou

@feikou feikou commented Aug 28, 2026

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Motivation

CDNA buffer range checking didn't match gfx950 hardware. This fixes, for CDNA1-4:

  • SOFFSET and the instruction offset now count toward the bounds check (only VOFFSET + inst_offset wraps at 32 bits).
  • An access must end within NUM_RECORDS, checked per dword for dwordx{2,3,4} loads and stores; format ops, atomics and MTBUF stay all-or-nothing.
  • Only IDXEN uses the index check on a strided buffer; OFFEN-only is checked by byte offset. ADD_TID_ENABLE buffers aren't checked.
  • The RDNA OOB_SELECT bit is no longer consulted on CDNA descriptors.
  • Out-of-range lanes of buffer_load ... lds write zeros to LDS instead of being skipped.

Previously the simulator ignored SOFFSET, dropped whole lanes, index-checked any strided buffer, and left LDS untouched.

Technical Details

  • shared/addr_calc_buffer.h: CDNA1-4 take a GFX9 range-check path; per-dword results go through element_lane_masks (feat(rocjitsu): cdna5 OOB behavior implementation #10362). RDNA and gfx1250 are unchanged.
  • vm/amdgpu/memory_pipeline.cpp: on CDNA1-4, out-of-range lanes of LDS loads write zeros.

The ISA docs and LLVM say SOFFSET isn't part of the check, but gfx950 hardware includes it, so this follows the hardware. ADD_TID_ENABLE addressing and DATA_FORMAT = 0 aren't modelled.

Issue Tracking

No existing issue. Related: #10362, #10192.

Test Plan

An encoded-kernel test on cdna1-4 (MubufRangeCheckTest), direct address-calculation tests on cdna3/cdna4 (CdnaAddrCalcTest.Mubuf*), and one RDNA3 case to confirm that path is unchanged.

Test Result

The new tests fail on develop and pass with this change. Expected values were measured on gfx950 (ROCm 7.2). The rest of ctest is unchanged and no generated files change.

Submission Checklist

@therock-pr-bot

therock-pr-bot Bot commented Aug 28, 2026

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🚫 Please fix the failed policies before requesting reviews.

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On gfx950 the MUBUF range check counts SOFFSET and the instruction
offset (VOFFSET + inst_offset wraps to 32 bits, SOFFSET does not),
clamps dwordx{2,3,4} loads and stores per dword, byte-checks a strided
resource addressed without IDXEN, and writes zeros to LDS for
out-of-range lanes of LDS-destination loads. Apply that rule on
CDNA1-4, reusing element_lane_masks for the per-dword clamp; RDNA and
gfx1250 are unchanged. Adds VM and address-calculation tests.
@feikou
feikou force-pushed the rocjitsu-gfx9-buffer-range-check branch from 4052166 to 64fa405 Compare August 29, 2026 01:54
@feikou
feikou marked this pull request as ready for review August 29, 2026 01:56
@feikou
feikou requested review from a team and atgutier as code owners August 29, 2026 01:56
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