fix(rocjitsu): correct gfx1250 v_cls_i32 semantics

[amd-eochoalo]

Motivation

Correct v_cls_i32 semantics on gfx1250 to prevent corruption of signed int64 to float conversions.

Technical Details

• Return 0xffffffff when all operand bits equal the sign bit.
• Return the full leading-sign-bit count for all other inputs.
• Update scalar, semantic-lowering, and SIMD code-generation paths.
• Regenerate the checked-in ISA sources.
• Add regression coverage for VOP1/VOP3 and scalar/SIMD execution.

Issue Tracking

Closes #10805

Test Plan

• Run the focused gfx1250 v_cls_i32 regression test.
• Run the AMD ISA generator tests.

Test Result

• Gfx1250SimulationTest.VClsI32CountsLeadingSignBits: passed.
• AMD ISA generator tests: 26 passed.
• Build completed successfully.

Submission Checklist

• Look over the contributing guidelines at https://github.com/ROCm/rocm-systems/blob/develop/CONTRIBUTING.md.

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