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0522865
[WS1][CUDA][MiniMax-H3] timestep_sinusoid_h3: FP32 timestep features …
fusheng-ji Oct 6, 2026
23a530e
[WS1][MiniMax-H3] timestep_sinusoid_h3: B200 evidence report and figure
fusheng-ji Oct 7, 2026
418998c
[WS1][CUDA][MiniMax-H3] timestep_mlp_fp32: deterministic FP32 timeste…
fusheng-ji Oct 7, 2026
e32bb4a
[WS1][MiniMax-H3] timestep_mlp_fp32: B200 evidence report and figure
fusheng-ji Oct 7, 2026
503305a
[WS1][CUDA][MiniMax-H3] adaln_projection_3mod: three-modality AdaLN p…
fusheng-ji Oct 7, 2026
404e766
[WS1][MiniMax-H3] adaln_projection_3mod: B200 evidence report and figure
fusheng-ji Oct 7, 2026
d275a06
[WS1][CUDA][MiniMax-H3] adaln_row_gather: fused six-way AdaLN row gather
fusheng-ji Oct 7, 2026
1f7253c
[WS1][MiniMax-H3] adaln_row_gather: B200 evidence report, chain repla…
fusheng-ji Oct 7, 2026
024ee08
[WS1][CUDA][MiniMax-H3] h3_rmsnorm: RMSNorm with fused AdaLN modulation
fusheng-ji Oct 7, 2026
7299784
[WS1][MiniMax-H3] h3_rmsnorm: B200 evidence report and figure
fusheng-ji Oct 7, 2026
e7bc53a
[WS1][CUDA][MiniMax-H3] adaln_gate_residual: gated residual with in-k…
fusheng-ji Oct 7, 2026
cd688b3
[WS1][MiniMax-H3] adaln_gate_residual: B200 evidence report and figure
fusheng-ji Oct 7, 2026
e7428b1
[WS1][CUDA][MiniMax-H3] final_adaln_out: norm_out projection + final …
fusheng-ji Oct 7, 2026
623bec8
[WS1][MiniMax-H3] final_adaln_out: B200 evidence report, chain replay…
fusheng-ji Oct 7, 2026
74a7772
fix(h3): reject mixed CUDA devices in deterministic linear helpers
fusheng-ji Oct 7, 2026
e0f9dcb
fix(h3): validate native timesteps and extracted weight contracts
fusheng-ji Oct 7, 2026
0fd6210
Merge timestep sinusoid review fixes into H3 timestep MLP
fusheng-ji Oct 7, 2026
ec5b2a7
Merge inherited RFC 420 review fixes into PR #485
fusheng-ji Oct 7, 2026
010c240
Merge inherited RFC 420 review fixes into PR #486
fusheng-ji Oct 7, 2026
82c9910
Merge inherited RFC 420 review fixes into PR #487
fusheng-ji Oct 7, 2026
debde49
Merge inherited RFC 420 review fixes into PR #488
fusheng-ji Oct 7, 2026
36f8f3f
Merge inherited RFC 420 review fixes into PR #489
fusheng-ji Oct 7, 2026
41ecf74
fix(h3): address AdaLN projection review findings
fusheng-ji Oct 7, 2026
2bbef22
fix(h3): validate native gather indices and replay stage dependencies
fusheng-ji Oct 7, 2026
50c97db
ci: enable CodeRabbit auto review for test-h3
fusheng-ji Oct 7, 2026
d113891
ci: enable CodeRabbit automatic reviews for test-h3
fusheng-ji Oct 7, 2026
5c79216
ci: inherit existing CodeRabbit review settings
fusheng-ji Oct 7, 2026
d1b71b6
docs(h3): document conditioning operators and review regression tests
fusheng-ji Oct 7, 2026
59476c9
test(h3): enforce complete tensor pairings in regression checks
fusheng-ji Oct 7, 2026
5f5cf94
fix(h3): preserve gradients for empty linear dimensions
fusheng-ji Oct 7, 2026
d2a6546
fix(h3): validate RMSNorm inputs and isolate backward benchmarks
fusheng-ji Oct 7, 2026
df519d8
docs(h3): refresh B200 evidence with backward-only alternating samples
fusheng-ji Oct 7, 2026
cc86740
fix(h3): reject mixed-device RMSNorm native inputs
fusheng-ji Oct 7, 2026
40a9b44
fix(h3): retain FP64 final AdaLN golden gradients
fusheng-ji Oct 7, 2026
7090f00
fix(h3): address native validation and evidence review comments
fusheng-ji Oct 7, 2026
cff41e8
docs(h3): regenerate final AdaLN evidence against FP64 gradients
fusheng-ji Oct 7, 2026
507c9ad
[WS2][CUDA][MiniMax-H3] tp_adaln_3mod: column-parallel AdaLN projecti…
fusheng-ji Oct 7, 2026
ecde5bb
[WS2][CUDA][MiniMax-H3] sp_norm_adaln: sequence-parallel norm/AdaLN/g…
fusheng-ji Oct 7, 2026
ef0c9ee
[WS2][MiniMax-H3] tp_adaln_3mod: 8 x B200 NCCL evidence report and fi…
fusheng-ji Oct 7, 2026
1bfeb6d
Merge tp_adaln_3mod evidence into PR #494
fusheng-ji Oct 7, 2026
63b8caa
[WS2][MiniMax-H3] sp_norm_adaln: 8 x B200 NCCL evidence report and fi…
fusheng-ji Oct 7, 2026
e4b8a62
fix(h3): store norm_out.norm and 1 + scale in BF16 in the final AdaLN…
fusheng-ji Oct 8, 2026
dcbd55b
docs(h3): regenerate final AdaLN evidence with the BF16 norm_out golden
fusheng-ji Oct 8, 2026
e880a10
test(h3): assert adaln_row_gather batch invariance per logical row
fusheng-ji Oct 8, 2026
93c692f
fix(h3): store norm(x) and 1 + scale in BF16 in the modulated RMSNorm…
fusheng-ji Oct 8, 2026
1438c4c
Merge inherited RFC 420 review fixes into PR #486
fusheng-ji Oct 8, 2026
df9b836
Merge inherited RFC 420 review fixes into PR #487
fusheng-ji Oct 8, 2026
a05952f
Merge inherited RFC 420 review fixes into PR #488
fusheng-ji Oct 8, 2026
7203797
Merge inherited RFC 420 review fixes into PR #489
fusheng-ji Oct 8, 2026
61c80d7
Merge inherited RFC 420 review fixes into PR #493
fusheng-ji Oct 8, 2026
ba00517
Merge inherited RFC 420 review fixes into PR #494
fusheng-ji Oct 8, 2026
edca559
feat(scripts): H3 prior-art runner: batch invariance, accuracy and la…
fusheng-ji Oct 8, 2026
2a984f6
Merge the H3 prior-art runner into PR #484
fusheng-ji Oct 8, 2026
fc8d815
Merge the H3 prior-art runner into PR #485
fusheng-ji Oct 8, 2026
604c134
Merge the H3 prior-art runner into PR #486
fusheng-ji Oct 8, 2026
17b2342
Merge the H3 prior-art runner into PR #487
fusheng-ji Oct 8, 2026
be7c6a9
Merge the H3 prior-art runner into PR #488
fusheng-ji Oct 8, 2026
c678545
Merge the H3 prior-art runner into PR #489
fusheng-ji Oct 8, 2026
5d0c7d5
Merge the H3 prior-art runner into PR #493
fusheng-ji Oct 8, 2026
24ddebd
Merge the H3 prior-art runner into PR #494
fusheng-ji Oct 8, 2026
0d3794d
fix(scripts): keep h3_prior_art mode results next to the report, not …
fusheng-ji Oct 8, 2026
39f0f80
Merge the H3 prior-art runner fix into PR #484
fusheng-ji Oct 8, 2026
99fe8c1
Merge the H3 prior-art runner fix into PR #485
fusheng-ji Oct 8, 2026
7083548
Merge the H3 prior-art runner fix into PR #486
fusheng-ji Oct 8, 2026
f6ad7a2
Merge the H3 prior-art runner fix into PR #487
fusheng-ji Oct 8, 2026
b4c9fd5
Merge the H3 prior-art runner fix into PR #488
fusheng-ji Oct 8, 2026
6231a8c
Merge the H3 prior-art runner fix into PR #489
fusheng-ji Oct 8, 2026
09625d2
Merge the H3 prior-art runner fix into PR #493
fusheng-ji Oct 8, 2026
3d440be
Merge the H3 prior-art runner fix into PR #494
fusheng-ji Oct 8, 2026
4b01e4f
fix(scripts): name the failing check in the H3 prior-art figure
fusheng-ji Oct 8, 2026
6acdd42
Merge the H3 prior-art figure fix into PR #484
fusheng-ji Oct 8, 2026
0be03cc
Merge the H3 prior-art figure fix into PR #485
fusheng-ji Oct 8, 2026
c06b1e0
Merge the H3 prior-art figure fix into PR #486
fusheng-ji Oct 8, 2026
0460cc7
Merge the H3 prior-art figure fix into PR #487
fusheng-ji Oct 8, 2026
052f5cb
Merge the H3 prior-art figure fix into PR #488
fusheng-ji Oct 8, 2026
875e2a1
Merge the H3 prior-art figure fix into PR #489
fusheng-ji Oct 8, 2026
3a14608
Merge the H3 prior-art figure fix into PR #493
fusheng-ji Oct 8, 2026
0ca4ced
Merge the H3 prior-art figure fix into PR #494
fusheng-ji Oct 8, 2026
d10034c
fix(scripts): shorter batch-invariance panel title in the H3 prior-ar…
fusheng-ji Oct 8, 2026
d7dba15
Merge the H3 prior-art figure fix into PR #484
fusheng-ji Oct 8, 2026
7158413
Merge the H3 prior-art figure fix into PR #485
fusheng-ji Oct 8, 2026
213d6ef
Merge the H3 prior-art figure fix into PR #486
fusheng-ji Oct 8, 2026
3098f4a
Merge the H3 prior-art figure fix into PR #487
fusheng-ji Oct 8, 2026
5f4253d
Merge the H3 prior-art figure fix into PR #488
fusheng-ji Oct 8, 2026
49287fc
Merge the H3 prior-art figure fix into PR #489
fusheng-ji Oct 8, 2026
b64f915
Merge the H3 prior-art figure fix into PR #493
fusheng-ji Oct 8, 2026
85a3403
Merge the H3 prior-art figure fix into PR #494
fusheng-ji Oct 8, 2026
9bf0605
docs(h3): adaln_row_gather vs existing implementations (B200, 6c900ae)
fusheng-ji Oct 8, 2026
dd35c14
docs(h3): gate_residual vs existing implementations (B200, 4010854)
fusheng-ji Oct 8, 2026
3146af1
docs(h3): timestep_sinusoid vs existing implementations (B200, 7a82917)
fusheng-ji Oct 8, 2026
4c040db
docs(h3): timestep_mlp vs existing implementations (B200, ffd958a)
fusheng-ji Oct 8, 2026
28cba87
docs(h3): adaln_projection vs existing implementations (B200, c88691c)
fusheng-ji Oct 8, 2026
656b64b
docs(h3): norm_modulate vs existing implementations (B200, ee83dec)
fusheng-ji Oct 8, 2026
8805329
docs(h3): final_adaln_out vs existing implementations (B200, 03da729)
fusheng-ji Oct 8, 2026
f9c5a8c
Merge the H3 prior-art evidence into PR #484
fusheng-ji Oct 8, 2026
076104c
Merge the H3 prior-art evidence into PR #485
fusheng-ji Oct 8, 2026
3908e8f
Merge the H3 prior-art evidence into PR #486
fusheng-ji Oct 8, 2026
f9d7768
Merge the H3 prior-art evidence into PR #487
fusheng-ji Oct 8, 2026
2d1b9d0
Merge the H3 prior-art evidence into PR #488
fusheng-ji Oct 8, 2026
64fb1fa
Merge the H3 prior-art evidence into PR #489
fusheng-ji Oct 8, 2026
f841e5d
Merge the H3 prior-art evidence into PR #493
fusheng-ji Oct 8, 2026
1968e13
Merge the H3 prior-art evidence into PR #494
fusheng-ji Oct 8, 2026
2e120f2
fix(scripts): readable H3 prior-art figure when errors are close or l…
fusheng-ji Oct 8, 2026
0ea4545
Merge the H3 prior-art figure layout fix into PR #484
fusheng-ji Oct 8, 2026
56bcee0
Merge the H3 prior-art figure layout fix into PR #485
fusheng-ji Oct 8, 2026
ef45a37
Merge the H3 prior-art figure layout fix into PR #486
fusheng-ji Oct 8, 2026
0329d03
Merge the H3 prior-art figure layout fix into PR #487
fusheng-ji Oct 8, 2026
1d1e739
Merge the H3 prior-art figure layout fix into PR #488
fusheng-ji Oct 8, 2026
8136ac3
Merge the H3 prior-art figure layout fix into PR #489
fusheng-ji Oct 8, 2026
6f364d7
Merge the H3 prior-art figure layout fix into PR #493
fusheng-ji Oct 8, 2026
407fa0f
Merge the H3 prior-art figure layout fix into PR #494
fusheng-ji Oct 8, 2026
a9ed126
Fix H3 native validation, backward timing, and rank cleanup
fusheng-ji Oct 9, 2026
72ed970
Regenerate gate and final AdaLN backward-only B200 evidence
fusheng-ji Oct 9, 2026
d960006
test(h3): consolidate native validation tests for review file limit
fusheng-ji Oct 9, 2026
86c168f
fix(h3): address automated review bounds, device, and benchmark findings
fusheng-ji Oct 9, 2026
919b67d
Merge test-h3 refactor and migrate H3 timestep validation
fusheng-ji Oct 10, 2026
ce16ef9
Merge test-h3 refactor and migrate H3 timestep MLP validation
fusheng-ji Oct 10, 2026
56e31ce
Merge test-h3 refactor and migrate H3 kernels, tools, and tests
fusheng-ji Oct 10, 2026
c3fad21
Merge test-h3 refactor and migrate H3 kernels, tools, and tests
fusheng-ji Oct 10, 2026
e004499
Merge test-h3 refactor and migrate H3 kernels, tools, and tests
fusheng-ji Oct 10, 2026
d22c1f8
Merge migrated H3 dependency PR #483
fusheng-ji Oct 10, 2026
4fe7296
Merge migrated H3 dependency PR #484
fusheng-ji Oct 10, 2026
96b0475
Merge test-h3 refactor and migrate H3 kernels, tools, and tests
fusheng-ji Oct 10, 2026
4f9da3d
Merge migrated H3 dependency PR #485
fusheng-ji Oct 10, 2026
d8039fd
Merge test-h3 refactor and migrate H3 kernels, tools, and tests
fusheng-ji Oct 10, 2026
b74aa08
Merge test-h3 refactor and migrate H3 SP kernels, tools, and tests
fusheng-ji Oct 10, 2026
a427494
Merge migrated H3 dependency PR #486
fusheng-ji Oct 10, 2026
fdc58d4
Merge migrated H3 dependency PR #487
fusheng-ji Oct 10, 2026
2737567
Merge migrated H3 dependency PR #488
fusheng-ji Oct 10, 2026
c41d03b
Merge test-h3 refactor and migrate H3 kernels, tools, and tests
fusheng-ji Oct 10, 2026
916ad44
Merge migrated H3 dependency PR #489
fusheng-ji Oct 10, 2026
91faa19
Merge migrated H3 TP dependency and retain SP review fixes
fusheng-ji Oct 10, 2026
93710b9
Sync migrated H3 stack ancestry
fusheng-ji Oct 10, 2026
78b8942
docs(h3): point row-gather validation to migrated tests
fusheng-ji Oct 10, 2026
1481baa
Merge migrated validation documentation from PR #486
fusheng-ji Oct 10, 2026
6682e76
Merge migrated validation documentation from PR #487
fusheng-ji Oct 10, 2026
5ae2256
Merge migrated validation documentation from PR #488
fusheng-ji Oct 10, 2026
8686d2c
Merge migrated validation documentation from PR #489
fusheng-ji Oct 10, 2026
3a56817
Merge migrated validation documentation from PR #493
fusheng-ji Oct 10, 2026
bf902e4
fix(h3): keep timestep_sinusoid_h3 out of fast-math builds
fusheng-ji Oct 13, 2026
0c5d8ed
Merge branch 'test-h3' into feat/h3-timestep-sinusoid
fusheng-ji Oct 13, 2026
b4b58b8
build(h3): gate every H3 bitwise kernel on one fast-math guard
fusheng-ji Oct 13, 2026
231de16
test(h3): skip the CUDA chain e2e when the H3 kernels are not built
fusheng-ji Oct 13, 2026
e04594b
Merge feat/h3-timestep-sinusoid into feat/h3-timestep-mlp-fp32
fusheng-ji Oct 13, 2026
fcac217
Merge feat/h3-timestep-mlp-fp32 into feat/h3-adaln-projection-3mod
fusheng-ji Oct 13, 2026
9243718
Merge feat/h3-adaln-projection-3mod into feat/h3-adaln-row-gather
fusheng-ji Oct 13, 2026
b52916a
test(h3): skip the CUDA chain backward e2e when the H3 kernels are no…
fusheng-ji Oct 13, 2026
db55298
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
f75ff23
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
2a72708
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
ebd2166
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
e1db135
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
be6a94a
tools(h3): direct bitwise comparison of reuse candidates
fusheng-ji Oct 13, 2026
367883a
evidence(h3): timestep_sinusoid direct bitwise comparison on B200
fusheng-ji Oct 13, 2026
73939f2
Merge feat/h3-timestep-sinusoid into feat/h3-timestep-mlp-fp32
fusheng-ji Oct 13, 2026
1a21cd6
evidence(h3): timestep_mlp direct bitwise comparison on B200
fusheng-ji Oct 13, 2026
50d1e92
Merge feat/h3-timestep-mlp-fp32 into feat/h3-adaln-projection-3mod
fusheng-ji Oct 13, 2026
c4f6145
evidence(h3): adaln_projection direct bitwise comparison on B200
fusheng-ji Oct 13, 2026
5fef115
Merge feat/h3-adaln-projection-3mod into feat/h3-adaln-row-gather
fusheng-ji Oct 13, 2026
62f8009
test(h3): fix the flaky FP32 table-gradient check in adaln_modulation
fusheng-ji Oct 13, 2026
7aeb6ba
evidence(h3): adaln_row_gather direct bitwise comparison on B200
fusheng-ji Oct 13, 2026
8379783
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
cad31b9
evidence(h3): norm_modulate direct bitwise comparison on B200
fusheng-ji Oct 13, 2026
a746bff
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
3bbcca4
evidence(h3): gate_residual direct bitwise comparison on B200
fusheng-ji Oct 13, 2026
8cb4abe
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
2809990
evidence(h3): final_adaln_out direct bitwise comparison on B200
fusheng-ji Oct 13, 2026
815e0be
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
919ba8a
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
49fa04a
test(h3): round the projection golden's activation from the FP32 SiLU
fusheng-ji Oct 13, 2026
5783276
Merge feat/h3-adaln-projection-3mod into feat/h3-adaln-row-gather
fusheng-ji Oct 13, 2026
ff3e3f3
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
3310212
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
3b618cd
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
fb22c4c
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
00ddc50
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
55370d6
test(h3): require exact dW/db equality in the projection golden check
fusheng-ji Oct 13, 2026
a07f1ed
Merge feat/h3-adaln-projection-3mod into feat/h3-adaln-row-gather
fusheng-ji Oct 13, 2026
2dc21b8
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
2c27639
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
a43b952
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
904a70e
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
732d314
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
0d433f6
test(h3): round the projection forward golden from the FP32 SiLU, req…
fusheng-ji Oct 13, 2026
60aa286
Merge feat/h3-adaln-projection-3mod into feat/h3-adaln-row-gather
fusheng-ji Oct 13, 2026
c8659cf
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
9c76b32
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
76542aa
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
ac1b95d
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
4705a44
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
579775f
fix(h3): round the adaln_projection golden's activation from the FP32…
fusheng-ji Oct 13, 2026
61d23ad
Merge feat/h3-adaln-projection-3mod into feat/h3-adaln-row-gather
fusheng-ji Oct 13, 2026
0032d07
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
81741e9
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
e7d1a7f
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
a4bc99f
fix(h3): round the final_adaln_out goldens' activation from the FP32 …
fusheng-ji Oct 13, 2026
357c151
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
299592c
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
068fcaa
evidence(h3): regenerate adaln_projection_3mod report after the golde…
fusheng-ji Oct 13, 2026
a00939e
Merge feat/h3-adaln-projection-3mod into feat/h3-adaln-row-gather
fusheng-ji Oct 13, 2026
ecb30e2
evidence(h3): regenerate adaln_row_gather report and chain replay aft…
fusheng-ji Oct 13, 2026
4315cee
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
a1e37ef
evidence(h3): regenerate the row-gather report on the newer runner af…
fusheng-ji Oct 13, 2026
d8a4a69
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
a7605c6
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
7d716f2
evidence(h3): regenerate final_adaln_out report and chain replay afte…
fusheng-ji Oct 13, 2026
ddca8f9
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
76594af
evidence(h3): regenerate this branch's final_adaln_out report after t…
fusheng-ji Oct 13, 2026
0d9d102
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
a6c8545
fix(h3): seed the row-gather op-backward check in the evidence report
fusheng-ji Oct 13, 2026
29b07c5
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
cbbfaed
evidence(h3): regenerate the row-gather report with the seeded op-bac…
fusheng-ji Oct 13, 2026
6136f31
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
fe0350c
evidence(h3): regenerate this branch's row-gather report with the see…
fusheng-ji Oct 13, 2026
9592623
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
578f9db
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
c9e350a
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
83e8133
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
fb1bd8a
fix(h3): seed the timestep_mlp timing inputs in the evidence report
fusheng-ji Oct 13, 2026
8ea6bbe
Merge feat/h3-timestep-mlp-fp32 into feat/h3-adaln-projection-3mod
fusheng-ji Oct 13, 2026
7f2fa85
fix(h3): seed the adaln_projection timing and invariance inputs in th…
fusheng-ji Oct 13, 2026
169af74
Merge feat/h3-adaln-projection-3mod into feat/h3-adaln-row-gather
fusheng-ji Oct 13, 2026
2553881
fix(h3): seed the row-gather timing inputs in the evidence report
fusheng-ji Oct 13, 2026
9778e66
Merge feat/h3-adaln-row-gather into feat/h3-rmsnorm
fusheng-ji Oct 13, 2026
95186cb
fix(h3): seed the plain-RMSNorm inputs of the norm evidence check
fusheng-ji Oct 13, 2026
8725b3d
test(h3): let the CPU timing shim accept seeded CUDA generators
fusheng-ji Oct 13, 2026
9b95c4a
Merge feat/h3-rmsnorm into feat/h3-adaln-gate-residual
fusheng-ji Oct 13, 2026
de6a224
Merge feat/h3-adaln-gate-residual into feat/h3-final-adaln-out
fusheng-ji Oct 13, 2026
a65a02b
Merge feat/h3-final-adaln-out into feat/h3-tp-adaln-3mod
fusheng-ji Oct 13, 2026
613d123
Merge feat/h3-tp-adaln-3mod into feat/h3-sp-norm-adaln
fusheng-ji Oct 13, 2026
0033b3a
docs: move the measurement outputs out of the pull request
fusheng-ji Oct 19, 2026
4ef511c
docs: point commit hashes at the rewritten history
fusheng-ji Oct 23, 2026
193f079
[WS1][CUDA][MiniMax-H3] ws1_one_h3_block: block 0 node-by-node replay…
fusheng-ji Oct 23, 2026
5ecb92d
[WS1][CUDA][MiniMax-H3] full-model qualification: thresholds, ensembl…
fusheng-ji Oct 23, 2026
66129bf
Merge test-h3 into feat/h3-sp-norm-adaln
fusheng-ji Oct 25, 2026
08983f5
Merge local/h3merge/h3-sp-norm-adaln into feat/h3-one-block-replay
fusheng-ji Oct 25, 2026
272aacc
Merge local/h3merge/h3-one-block-replay into feat/h3-full-model-quali…
fusheng-ji Oct 25, 2026
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7 changes: 5 additions & 2 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,9 @@ name: CI-Pipeline

on:
push:
branches: [ main, test ]
branches: [ main, test, test-h3 ]
pull_request:
branches: [ main, test ]
branches: [ main, test, test-h3 ]

permissions:
contents: read
Expand Down Expand Up @@ -71,6 +71,9 @@ jobs:
- name: Check refactor packaging and compatibility
run: python ci/run.py layout -q

- name: Run full H3 binding contracts
run: python -m pytest -q tests/models/minimax_h3/test_h3_full_model.py

- name: Run Mocked Hardware Discovery Tests
run: |
python -m pytest tests/runtime/test_dispatch.py -v
Expand Down
71 changes: 71 additions & 0 deletions benchmarks/models/benchmark_h3_conditioning.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,71 @@
# SPDX-License-Identifier: Apache-2.0
# Copyright (c) 2026 RL-Kernel Contributors

"""Benchmark the MiniMax-H3 conditioning ops (RFC #420) against the provider path.

CUDA-event medians, bandwidth and peak memory per case, plus the backend
the registry dispatched. Timings alternate candidate/provider execution order;
backward timings exclude forward setup. Cases live in ``rl_engine/validation/models/h3_report.py``.

python benchmarks/models/benchmark_h3_conditioning.py --op timestep_sinusoid_h3
python benchmarks/models/benchmark_h3_conditioning.py --op all --json out.json
"""

from __future__ import annotations

import argparse
import json
import sys
from pathlib import Path

sys.path.insert(0, str(Path(__file__).resolve().parents[2]))

import torch # noqa: E402

from rl_engine.runtime.registry import KernelRegistry # noqa: E402
from rl_engine.validation.models.h3_chain import environment # noqa: E402
from rl_engine.validation.models.h3_report import PERF_CASES, TIMED_KEYS, measure # noqa: E402


def main() -> None:
"""Benchmark selected CUDA operators, print summaries, and optionally save JSON."""

parser = argparse.ArgumentParser(description=__doc__)
parser.add_argument("--op", default="all", choices=["all", *PERF_CASES])
parser.add_argument("--warmup", type=int, default=20)
parser.add_argument("--iters", type=int, default=200)
parser.add_argument("--json", type=Path, default=None)
args = parser.parse_args()
if not torch.cuda.is_available():
raise SystemExit("needs a CUDA device")
torch.backends.cuda.matmul.allow_tf32 = False

registry = KernelRegistry()
env = environment()
print(f"device={env['gpu']} torch={env['torch']} cuda={env['cuda']}")
print("timing order alternates each iteration; backward timings exclude forward setup")
results = []
for name in list(PERF_CASES) if args.op == "all" else [args.op]:
for case in PERF_CASES[name](registry):
row = measure(case, args.warmup, args.iters)
results.append(row)
parts = [
f"{key}={row[f'{key}_us']:.2f}us ({row[f'{key}_gbps']:.1f} GB/s, "
f"peak {row[f'{key}_peak_mib']:.2f} MiB)"
for key in TIMED_KEYS
if f"{key}_us" in row
]
order = row["execution_order"]
phases = [" -> ".join(order[f"iteration_{i}"]) for i in (0, 1)]
print(
f"{name} {row['case']} [{row['backend']}]: "
+ "; ".join(parts)
+ "; alternating order: "
+ " / ".join(phases)
)
if args.json is not None:
args.json.write_text(json.dumps({"environment": env, "results": results}, indent=2) + "\n")


if __name__ == "__main__":
main()
22 changes: 21 additions & 1 deletion build_tools/extensions.py
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,20 @@

_PROJECT_ROOT = Path(__file__).resolve().parents[1]

# MiniMax-H3 (RFC #420) kernels promise bitwise parity with diffusers' eager
# FP32 math. --use_fast_math swaps expf/sinf/cosf/rsqrtf and division for
# approximations and flushes denormals, so these sources are left out of
# KERNEL_ALIGN_USE_FAST_MATH=1 builds; their bindings are gated on
# KERNEL_ALIGN_WITH_H3_KERNELS and dispatch falls back to the PyTorch reference.
H3_BITWISE_SOURCES = (
"csrc/cuda/h3/timestep_sinusoid.cu",
"csrc/cuda/h3/det_linear.cu",
"csrc/cuda/h3/adaln_row_gather.cu",
"csrc/cuda/h3/rmsnorm_modulate.cu",
"csrc/cuda/h3/gate_residual.cu",
)
H3_KERNELS_DEFINE = "-DKERNEL_ALIGN_WITH_H3_KERNELS"


def _resolve_package_data_source(
filename: str | os.PathLike[str],
Expand Down Expand Up @@ -219,6 +233,7 @@ def get_extensions():
)

if is_rocm or torch.cuda.is_available():
use_fast_math = envs.env_flag(envs.KERNEL_ALIGN_USE_FAST_MATH)
cuda_sources = [
"csrc/bindings/ops.cpp",
"csrc/cuda/logprob/fused_logp_kernel.cu",
Expand All @@ -241,12 +256,14 @@ def get_extensions():
# CUDA IPC and the fixed-tree collective implementation are not
# part of the ROCm extension.
cuda_sources.append("csrc/cuda/collectives/deterministic_collective.cu")
if not use_fast_math:
cuda_sources.extend(H3_BITWISE_SOURCES)
# This source contains NVIDIA PTX (cp.async, ldmatrix, and mma.sync).
# The ROCm dispatcher falls back to PyTorch SDPA for this operator.
cuda_sources.append("csrc/cuda/attention/prefix_shared_attention.cu")

nvcc_flags = ["-O3", "-Xfatbin", "-compress-all"]
if envs.env_flag(envs.KERNEL_ALIGN_USE_FAST_MATH):
if use_fast_math:
nvcc_flags.append("--use_fast_math")
if not is_rocm:
cc_major, cc_minor = torch.cuda.get_device_capability()
Expand Down Expand Up @@ -333,6 +350,9 @@ def get_extensions():
if os.name != "nt" and not is_rocm:
# CUDA IPC metadata queries use the driver API (cuPointerGetAttribute).
extra_link_args.append("-lcuda")
if not is_rocm and not use_fast_math:
cxx_flags.append(H3_KERNELS_DEFINE)
nvcc_flags.append(H3_KERNELS_DEFINE)

if not is_rocm:
sm90_srcs = [
Expand Down
133 changes: 133 additions & 0 deletions csrc/bindings/ops.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -500,6 +500,67 @@ at::Tensor prefix_shared_attention(
#endif
#endif

// MiniMax-H3 (RFC #420) conditioning-path declarations. CUDA only.
// Fast-math builds omit the H3 sources (bitwise contract), so gate on the build define.
#if defined(KERNEL_ALIGN_WITH_H3_KERNELS)
torch::Tensor h3_timestep_sinusoid_forward(torch::Tensor timestep, int64_t num_channels,
double max_period, bool check_range);
std::vector<torch::Tensor> h3_det_linear_forward(torch::Tensor x, torch::Tensor weight,
c10::optional<torch::Tensor> bias,
int64_t activation, bool save_pre_activation);
torch::Tensor h3_det_linear_backward_input(torch::Tensor grad, torch::Tensor weight,
c10::ScalarType out_dtype);
torch::Tensor h3_det_linear_backward_input_partials(torch::Tensor grad, torch::Tensor weight);
torch::Tensor h3_det_linear_fold_chunks(torch::Tensor partial, c10::ScalarType out_dtype);
std::vector<torch::Tensor> h3_det_linear_backward_weight(torch::Tensor grad, torch::Tensor x,
c10::ScalarType w_dtype,
bool with_bias);
torch::Tensor h3_adaln_row_gather_forward(torch::Tensor rows, torch::Tensor timestep_indices,
torch::Tensor token_tags, int64_t chunks,
int64_t modality_num);
torch::Tensor h3_adaln_row_gather_backward(torch::Tensor grad, torch::Tensor sorted_pos,
torch::Tensor tile_begin, torch::Tensor tile_end,
torch::Tensor seg_first_tile,
c10::ScalarType out_dtype);
std::vector<torch::Tensor> h3_rmsnorm_forward(torch::Tensor x, torch::Tensor weight, double eps,
c10::optional<torch::Tensor> shift,
c10::optional<torch::Tensor> scale,
c10::optional<torch::Tensor> index);
std::vector<torch::Tensor> h3_rmsnorm_backward(
torch::Tensor grad, torch::Tensor x, torch::Tensor weight, torch::Tensor rstd,
c10::optional<torch::Tensor> shift, c10::optional<torch::Tensor> scale,
c10::optional<torch::Tensor> index, c10::optional<torch::Tensor> sorted_pos,
c10::optional<torch::Tensor> tile_begin, c10::optional<torch::Tensor> tile_end,
c10::optional<torch::Tensor> seg_first_tile);
torch::Tensor h3_gate_residual_forward(torch::Tensor residual, torch::Tensor y, torch::Tensor gate,
torch::Tensor index);
std::vector<torch::Tensor> h3_gate_residual_backward(torch::Tensor grad, torch::Tensor y,
torch::Tensor gate, torch::Tensor index,
torch::Tensor sorted_pos,
torch::Tensor tile_begin,
torch::Tensor tile_end,
torch::Tensor seg_first_tile);
std::vector<torch::Tensor> h3_rmsnorm_backward_partials(
torch::Tensor grad, torch::Tensor x, torch::Tensor weight, torch::Tensor rstd,
c10::optional<torch::Tensor> shift, c10::optional<torch::Tensor> scale,
c10::optional<torch::Tensor> index, torch::Tensor dw_rows, torch::Tensor dw_begin,
torch::Tensor dw_end, c10::optional<torch::Tensor> seg_rows,
c10::optional<torch::Tensor> seg_begin, c10::optional<torch::Tensor> seg_end);
std::vector<torch::Tensor> h3_rmsnorm_fold_partials(torch::Tensor dw_partial, torch::Tensor weight,
c10::optional<torch::Tensor> seg_partial,
c10::optional<torch::Tensor> seg_first_tile);
torch::Tensor h3_gate_grad_partials(torch::Tensor grad, torch::Tensor y, torch::Tensor rows,
torch::Tensor tile_begin, torch::Tensor tile_end);
torch::Tensor h3_gate_grad_fold(torch::Tensor partial, torch::Tensor seg_first_tile,
c10::ScalarType dtype);
torch::Tensor h3_rmsnorm_backward_dx(torch::Tensor grad, torch::Tensor x, torch::Tensor weight,
torch::Tensor rstd, c10::optional<torch::Tensor> shift,
c10::optional<torch::Tensor> scale,
c10::optional<torch::Tensor> index);
torch::Tensor h3_gate_residual_backward_dy(torch::Tensor grad, torch::Tensor gate,
torch::Tensor index);
#endif

// PyBind11 Module Registration
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
m.doc() = "RL-Kernel High-Performance Operator Extension Library";
Expand Down Expand Up @@ -758,4 +819,76 @@ PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
"Deterministic GPT-NeoX token-major RoPE apply for ROCm");
#endif
#endif

#if defined(KERNEL_ALIGN_WITH_H3_KERNELS)
m.def("h3_timestep_sinusoid_forward", torch::wrap_pybind_function(h3_timestep_sinusoid_forward),
"MiniMax-H3 FP32 [cos | sin] timestep features, bitwise to the diffusers CUDA path",
py::arg("timestep"), py::arg("num_channels") = 256, py::arg("max_period") = 10000.0,
py::arg("check_range") = true);
m.def("h3_det_linear_forward", &h3_det_linear_forward,
"Batch-invariant warp-per-column linear (contract h3-det-linear-v1), optional SiLU",
py::arg("x"), py::arg("weight"), py::arg("bias") = py::none(),
py::arg("activation") = 0, py::arg("save_pre_activation") = false);
m.def("h3_det_linear_backward_input", &h3_det_linear_backward_input,
"Deterministic grad @ weight with fixed 64-row N chunks folded in order",
py::arg("grad"), py::arg("weight"), py::arg("out_dtype"));
m.def("h3_det_linear_backward_input_partials", &h3_det_linear_backward_input_partials,
"Per-64-row-chunk FP32 partials of grad @ weight, before the ascending fold",
py::arg("grad"), py::arg("weight"));
m.def("h3_det_linear_fold_chunks", &h3_det_linear_fold_chunks,
"Ascending left fold of h3_det_linear_backward_input_partials, cast once",
py::arg("partial"), py::arg("out_dtype"));
m.def("h3_det_linear_backward_weight", &h3_det_linear_backward_weight,
"Deterministic dW/dbias as ascending-row FP32 folds",
py::arg("grad"), py::arg("x"), py::arg("w_dtype"), py::arg("with_bias") = true);
m.def("h3_adaln_row_gather_forward", &h3_adaln_row_gather_forward,
"Fused six-way AdaLN row gather by timestep_index * 3 + token_tag (pure copy)",
py::arg("rows"), py::arg("timestep_indices"), py::arg("token_tags"),
py::arg("chunks") = 6, py::arg("modality_num") = 3);
m.def("h3_adaln_row_gather_backward", &h3_adaln_row_gather_backward,
"Deterministic segmented sum (sorted tiles folded in order) for the row gather",
py::arg("grad"), py::arg("sorted_pos"), py::arg("tile_begin"), py::arg("tile_end"),
py::arg("seg_first_tile"), py::arg("out_dtype"));
m.def("h3_rmsnorm_forward", &h3_rmsnorm_forward,
"RMSNorm replaying PyTorch's reduction order, with optional fused AdaLN modulation",
py::arg("x"), py::arg("weight"), py::arg("eps"), py::arg("shift") = py::none(),
py::arg("scale") = py::none(), py::arg("index") = py::none());
m.def("h3_rmsnorm_backward", &h3_rmsnorm_backward,
"Deterministic RMSNorm(+modulation) backward: row-local dx, tiled dweight, sorted table grads",
py::arg("grad"), py::arg("x"), py::arg("weight"), py::arg("rstd"),
py::arg("shift") = py::none(), py::arg("scale") = py::none(),
py::arg("index") = py::none(), py::arg("sorted_pos") = py::none(),
py::arg("tile_begin") = py::none(), py::arg("tile_end") = py::none(),
py::arg("seg_first_tile") = py::none());
m.def("h3_gate_residual_forward", &h3_gate_residual_forward,
"residual + gate[index] * y with the gate row gathered in-kernel (eager rounding order)",
py::arg("residual"), py::arg("y"), py::arg("gate"), py::arg("index"));
m.def("h3_gate_residual_backward", &h3_gate_residual_backward,
"Gated-residual backward: exact dy, deterministic sorted segment sum for dgate",
py::arg("grad"), py::arg("y"), py::arg("gate"), py::arg("index"), py::arg("sorted_pos"),
py::arg("tile_begin"), py::arg("tile_end"), py::arg("seg_first_tile"));
m.def("h3_rmsnorm_backward_partials", &h3_rmsnorm_backward_partials,
"WS1 RMSNorm dweight / table-gradient tile partials over explicit row lists (SP)",
py::arg("grad"), py::arg("x"), py::arg("weight"), py::arg("rstd"), py::arg("shift"),
py::arg("scale"), py::arg("index"), py::arg("dw_rows"), py::arg("dw_begin"),
py::arg("dw_end"), py::arg("seg_rows") = py::none(), py::arg("seg_begin") = py::none(),
py::arg("seg_end") = py::none());
m.def("h3_rmsnorm_fold_partials", &h3_rmsnorm_fold_partials,
"WS1 ascending folds of RMSNorm dweight and per-segment table-gradient partials",
py::arg("dw_partial"), py::arg("weight"), py::arg("seg_partial") = py::none(),
py::arg("seg_first_tile") = py::none());
m.def("h3_gate_grad_partials", &h3_gate_grad_partials,
"WS1 d_gate tile partials over explicit row lists (SP)", py::arg("grad"), py::arg("y"),
py::arg("rows"), py::arg("tile_begin"), py::arg("tile_end"));
m.def("h3_gate_grad_fold", &h3_gate_grad_fold,
"WS1 per-segment ascending fold of d_gate partials, cast once", py::arg("partial"),
py::arg("seg_first_tile"), py::arg("dtype"));
m.def("h3_rmsnorm_backward_dx", &h3_rmsnorm_backward_dx,
"Row-local dx of the WS1 RMSNorm(+modulation) backward", py::arg("grad"), py::arg("x"),
py::arg("weight"), py::arg("rstd"), py::arg("shift") = py::none(),
py::arg("scale") = py::none(), py::arg("index") = py::none());
m.def("h3_gate_residual_backward_dy", &h3_gate_residual_backward_dy,
"Row-local d_y = grad * gate[index] of the WS1 gated-residual backward",
py::arg("grad"), py::arg("gate"), py::arg("index"));
#endif
}
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