Fix the Swift calling convention patches for RISC-V, MIPS and 32-bit PowerPC

README.md

@@ -30,17 +30,21 @@ which is run by hand rather than on every push.
 | `swift_mips64_defconfig` | MIPS 64r6 N64, big endian | glibc |
 | `swift_riscv64_defconfig` | RISC-V 64-bit | glibc |
 
-MIPS and 32-bit PowerPC need the Swift calling convention in clang, which no
-Swift release carries yet. The patches are in
+MIPS, 32-bit PowerPC and RISC-V need the Swift calling convention in clang,
+which no Swift release carries yet. The patches are in
 `package/swift/swift-source-patches/llvm-project/`, but they only take effect
 in a toolchain built from source: `install-swift.sh` downloads a prebuilt one
 and symlinks `SWIFT_LLVM_DIR` at the system LLVM, which makes `host-swift`
 skip its own build. Pass a toolchain that carries them through the workflow's
-`toolchain_url` input, or those two architectures are built by a clang that
+`toolchain_url` input, or those architectures are built by a clang that
 ignores `swiftcall`.
 
-RISC-V 64 needs no such patch - `RISCVTargetCodeGenInfo` already registers a
-`SwiftABIInfo` upstream.
+RISC-V 64 looks at first like it needs no such patch - `RISCVTargetCodeGenInfo`
+does register a `SwiftABIInfo` upstream - but that is only the CodeGen half.
+`RISCVTargetInfo::checkCallingConvention` rejects `CC_Swift`, so sema drops the
+attribute before CodeGen ever sees it and the runtime headers fail on every
+`SWIFT_CONTEXT` parameter, and `LowerFormalArguments` has no case for
+`CallingConv::Swift`. Both are patched here.
 
 ## Swift sources
 

package/swift/swift-source-patches/llvm-project/0001-clang-Add-Swift-support-for-MIPS.patch

@@ -1,22 +1,57 @@
-From cd4382da1d35c5ba89c5ee06287499ba57a27496 Mon Sep 17 00:00:00 2001
+From dea5f937ef8c851a668e3334a701b023de9ad2e9 Mon Sep 17 00:00:00 2001
 From: Alsey Coleman Miller <alseycmiller@gmail.com>
 Date: Wed, 24 Jun 2026 20:15:51 -0400
 Subject: [clang] Add Swift support for MIPS
 
-Adds support for compiling Swift targeting the MIPS ABI
+Compiling anything for MIPS with the Swift calling convention fails in
+two places.
 
-Without a registered SwiftABIInfo, clang aborts with "Swift ABI info has
-not been initialized" as soon as anything is compiled for MIPS with the
-Swift calling convention.
+MipsTargetInfo does not override checkCallingConvention, so it inherits
+the base implementation accepting only CC_C: sema drops swiftcall and
+substitutes the default convention, after which every SWIFT_CONTEXT
+parameter in the runtime headers is a hard error. Past that,
+MIPSTargetCodeGenInfo registers no SwiftABIInfo, so clang aborts with
+"Swift ABI info has not been initialized".
 
-Upstream: https://github.com/swiftlang/llvm-project/pull/13246 (open)
+Accept CC_Swift and register the SwiftABIInfo. The convention is lowered
+like the C convention, and SwiftErrorInRegister is false so the error is
+passed indirectly - the backend needs no change, having no calling
+convention gate of its own. CC_SwiftAsync is refused the way SystemZ and
+PPC64 refuse it, so __has_extension(swiftasynccc) stays false and
+swift's Config.h falls back to SWIFT_CC(swift).
+
+Upstream: https://github.com/llvm/llvm-project/pull/213446 (open)
 Signed-off-by: Alsey Coleman Miller <alseycmiller@gmail.com>
 ---
- clang/lib/CodeGen/Targets/Mips.cpp | 5 ++++-
- 1 file changed, 4 insertions(+), 1 deletion(-)
+ clang/lib/Basic/Targets/Mips.h     | 12 ++++++++++++
+ clang/lib/CodeGen/Targets/Mips.cpp |  5 ++++-
+ 2 files changed, 16 insertions(+), 1 deletion(-)
 
+diff --git a/clang/lib/Basic/Targets/Mips.h b/clang/lib/Basic/Targets/Mips.h
+index e199df32f56ee..12e0a0fd2d7fa 100644
+--- a/clang/lib/Basic/Targets/Mips.h
++++ b/clang/lib/Basic/Targets/Mips.h
+@@ -447,6 +447,18 @@ public:
+   bool validateTarget(DiagnosticsEngine &Diags) const override;
+   bool hasBitIntType() const override { return true; }
+
++  CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
++    switch (CC) {
++    case CC_C:
++    case CC_Swift:
++      return CCCR_OK;
++    case CC_SwiftAsync:
++      return CCCR_Error;
++    default:
++      return CCCR_Warning;
++    }
++  }
++
+   std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
+     return std::make_pair(32, 32);
+   }
 diff --git a/clang/lib/CodeGen/Targets/Mips.cpp b/clang/lib/CodeGen/Targets/Mips.cpp
-index 22fdcd95ea8fa..3693e5dbfa91c 100644
+index c025f7312959c..cf4bd41a74415 100644
 --- a/clang/lib/CodeGen/Targets/Mips.cpp
 +++ b/clang/lib/CodeGen/Targets/Mips.cpp
 @@ -44,7 +44,10 @@ class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {

package/swift/swift-source-patches/llvm-project/0002-clang-Add-Swift-support-for-32-bit-PowerPC.patch

@@ -1,24 +1,58 @@
-From 18fa1c96e38828442d139dbf8ca1450f13aa7661 Mon Sep 17 00:00:00 2001
+From cba476e6261305c2aec8fe5d972ad962a00236d2 Mon Sep 17 00:00:00 2001
 From: Alsey Coleman Miller <alseycmiller@gmail.com>
 Date: Fri, 26 Jun 2026 09:14:41 -0400
 Subject: [clang] Add Swift support for 32-bit PowerPC
 
+The Swift side of 32-bit PowerPC support is already in the release; the
+clang and backend halves of the calling convention are missing.
 
-The Swift side of 32-bit PowerPC support is already in the release; only
-the clang and backend halves of the calling convention are missing.
+PPC64TargetInfo accepts CC_Swift, but PPC32TargetInfo overrides
+checkCallingConvention nowhere, so 32-bit inherits the base
+implementation accepting only CC_C: sema drops swiftcall before CodeGen
+sees it and every SWIFT_CONTEXT parameter in the runtime headers fails
+to compile. Add the table, register a SwiftABIInfo, and let
+LowerCall_32SVR4 accept the convention instead of asserting on it.
 
-Upstream: https://github.com/swiftlang/llvm-project/pull/13257 (open)
+The table keeps CC_C returning CCCR_OK, as SystemZ does, so an explicit
+cdecl does not start warning on 32-bit. CC_SwiftAsync stays refused, as
+on PPC64.
+
+Upstream: https://github.com/llvm/llvm-project/pull/213447 (open)
 Signed-off-by: Alsey Coleman Miller <alseycmiller@gmail.com>
 ---
- clang/lib/CodeGen/Targets/PPC.cpp           | 5 ++++-
- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 7 ++++---
- 2 files changed, 8 insertions(+), 4 deletions(-)
+ clang/lib/Basic/Targets/PPC.h               | 12 ++++++++++++
+ clang/lib/CodeGen/Targets/PPC.cpp           |  5 ++++-
+ llvm/lib/Target/PowerPC/PPCISelLowering.cpp |  6 +++---
+ 3 files changed, 19 insertions(+), 4 deletions(-)
 
+diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h
+index 9f3a4cd2da716..6ea0e40e41102 100644
+--- a/clang/lib/Basic/Targets/PPC.h
++++ b/clang/lib/Basic/Targets/PPC.h
+@@ -431,6 +431,18 @@ public:
+     return TargetInfo::PowerABIBuiltinVaList;
+   }
+
++  CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
++    switch (CC) {
++    case CC_C:
++    case CC_Swift:
++      return CCCR_OK;
++    case CC_SwiftAsync:
++      return CCCR_Error;
++    default:
++      return CCCR_Warning;
++    }
++  }
++
+   std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
+     return std::make_pair(32, 32);
+   }
 diff --git a/clang/lib/CodeGen/Targets/PPC.cpp b/clang/lib/CodeGen/Targets/PPC.cpp
-index ab069bfbd1b51..d2e8d607806b5 100644
+index 4df4c9f3c3475..c4cd04735a3ee 100644
 --- a/clang/lib/CodeGen/Targets/PPC.cpp
 +++ b/clang/lib/CodeGen/Targets/PPC.cpp
-@@ -387,7 +387,10 @@ class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
+@@ -358,7 +358,10 @@ public:
    PPC32TargetCodeGenInfo(CodeGenTypes &CGT, bool SoftFloatABI,
                           bool RetSmallStructInRegABI)
        : TargetCodeGenInfo(std::make_unique<PPC32_SVR4_ABIInfo>(
@@ -31,19 +65,18 @@ index ab069bfbd1b51..d2e8d607806b5 100644
    static bool isStructReturnInRegABI(const llvm::Triple &Triple,
                                       const CodeGenOptions &Opts);
 diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
-index 76cc06f2b4ed9..1c30846a3182c 100644
+index b6db0abcc86d0..0fdd96710266b 100644
 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
 +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
-@@ -5978,9 +5978,10 @@ SDValue PPCTargetLowering::LowerCall_32SVR4(
+@@ -5995,9 +5995,9 @@ SDValue PPCTargetLowering::LowerCall_32SVR4(
    const bool IsVarArg = CFlags.IsVarArg;
    const bool IsTailCall = CFlags.IsTailCall;
 
 -  assert((CallConv == CallingConv::C ||
 -          CallConv == CallingConv::Cold ||
 -          CallConv == CallingConv::Fast) && "Unknown calling convention!");
 +  assert((CallConv == CallingConv::C || CallConv == CallingConv::Cold ||
-+          CallConv == CallingConv::Fast || CallConv == CallingConv::Swift ||
-+          CallConv == CallingConv::SwiftTail) &&
++          CallConv == CallingConv::Fast || CallConv == CallingConv::Swift) &&
 +         "Unknown calling convention!");
 
    const Align PtrAlign(4);

package/swift/swift-source-patches/llvm-project/0003-clang-Add-Swift-support-for-RISC-V.patch

@@ -0,0 +1,55 @@
+From 4be15ecb3bdada0a7b15d77988c4d6d7cb97a655 Mon Sep 17 00:00:00 2001
+From: Alsey Coleman Miller <alseycmiller@gmail.com>
+Date: Sat, 1 Aug 2026 08:23:59 -0400
+Subject: [clang] Add Swift support for RISC-V
+
+RISCVTargetCodeGenInfo already registers a SwiftABIInfo, so the CodeGen
+half is in place, but nothing reaches it:
+RISCVTargetInfo::checkCallingConvention never accepts CC_Swift, so sema
+drops the attribute and substitutes the default convention. Every
+SWIFT_CONTEXT parameter in the runtime headers then fails with
+'swift_context' parameter can only be used with swiftcall or
+swiftasynccall calling convention, which is where building the stdlib
+for riscv64 stops.
+
+Accept CC_Swift and lower it: without a case in LowerFormalArguments the
+switch falls to its default and aborts with 'Unsupported calling
+convention'. It needs no separate assignment - CC_RISCV is what the C
+convention already uses, and SwiftErrorInRegister is false, so the error
+is passed indirectly. CC_SwiftAsync is refused the way SystemZ and PPC64
+refuse it, so swift's Config.h falls back to SWIFT_CC(swift) for it.
+
+Upstream: https://github.com/llvm/llvm-project/pull/213448 (open)
+Signed-off-by: Alsey Coleman Miller <alseycmiller@gmail.com>
+---
+ clang/lib/Basic/Targets/RISCV.cpp           | 3 +++
+ llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 1 +
+ 2 files changed, 4 insertions(+)
+
+diff --git a/clang/lib/Basic/Targets/RISCV.cpp b/clang/lib/Basic/Targets/RISCV.cpp
+index 8a28c0788aad7..17b8db2143133 100644
+--- a/clang/lib/Basic/Targets/RISCV.cpp
++++ b/clang/lib/Basic/Targets/RISCV.cpp
+@@ -607,7 +607,10 @@ RISCVTargetInfo::checkCallingConvention(CallingConv CC) const {
+   case CC_RISCVVLSCall_16384:
+   case CC_RISCVVLSCall_32768:
+   case CC_RISCVVLSCall_65536:
++  case CC_Swift:
+     return CCCR_OK;
++  case CC_SwiftAsync:
++    return CCCR_Error;
+   }
+ }
+
+diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+index 567ef2ff19f06..d3fb2af20265b 100644
+--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
++++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+@@ -22239,6 +22239,7 @@ SDValue RISCVTargetLowering::LowerFormalArguments(
+   case CallingConv::PreserveMost:
+   case CallingConv::GRAAL:
+   case CallingConv::RISCV_VectorCall:
++  case CallingConv::Swift:
+ #define CC_VLS_CASE(ABI_VLEN) case CallingConv::RISCV_VLSCall_##ABI_VLEN:
+     CC_VLS_CASE(32)
+     CC_VLS_CASE(64)