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8 Bit Breadboard Computer (SAP-1)

The Model and Software Supporting my implementations of the SAP-1 Computer Architecture as inspired by Ben Eater in both logisim and TTL hardware logic.

Hardware Design:

https://github.com/MeadeRobert/sap1/blob/master/images/hardware.jpg

Youtube Design Overview Video

8-Bit Computer Assembly RMX (Robert Meade Assembly)

Version H0.1 (Hardware 0.1) - Currently Running on the Hardware Implementation

Current Logisim Design:

https://github.com/MeadeRobert/sap1/blob/master/images/sar_test_0.PNG

Ben Eater's Design with JLZ instruction added:

https://github.com/MeadeRobert/sap1/blob/master/images/fibonacci_0.PNG

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The Software Supporting my implementations of the SAP-1 Computer Architecture as inspired by Ben Eater in both logisim and TTL hardware logic.

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