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[Ascend] Support exact placement of versioned on-chip buffers - #9

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Denverjin wants to merge 2 commits into
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codex/ascend-buffer-placement-hints
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Denverjin wants to merge 2 commits into
mainfrom
codex/ascend-buffer-placement-hints

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@Denverjin

@Denverjin Denverjin commented Oct 21, 2026 •

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Add T.annotate_buffer_offsets for exact byte placement of UB, L1, L0A/L0B/L0C, and SS allocations within their physical memory pools in the scheduled Ascend pipeline.

Each placed buffer must declare an explicit fixed count with T.annotate_buffer_versions. Reject missing or mode-only version declarations, version counts the scheduler cannot honor, physical overlaps, misalignment, dynamic allocation sizes, and capacity overflow after version expansion and layout padding. Account for the SIMT UB context reservation and keep AIV-private UB address spaces distinct.

Partial maps reserve fixed intervals and place the remaining buffers in aligned free space without reuse in the affected pool. Bound L0 scale-factor handles follow their data buffer. Pools without placement annotations retain their existing allocation behavior.

@Denverjin Denverjin changed the title [Ascend] Establish buffer placement hints from exact L1 offsets [Ascend] Support exact placement of versioned on-chip buffers Oct 21, 2026
@Denverjin Denverjin closed this Oct 22, 2026
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