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AMD/Xilinx Versal Gen 1 VMK180 wolfBoot support
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‎arch.mk‎

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@@ -78,23 +78,34 @@ ifeq ($(ARCH),AARCH64)
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HASH_HAL=1
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CFLAGS+=-DWOLFBOOT_ZYNQMP_CSU
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endif
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else
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ifeq ($(TARGET),nxp_ls1028a)
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ARCH_FLAGS=-mcpu=cortex-a72+crypto -march=armv8-a+crypto -mtune=cortex-a72
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CFLAGS+=$(ARCH_FLAGS) -DCORTEX_A72
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endif
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CFLAGS +=-ffunction-sections -fdata-sections
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LDFLAGS+=-Wl,--gc-sections
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ifeq ($(TARGET),versal)
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# AMD Versal ACAP (VMK180) - Dual Cortex-A72
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ARCH_FLAGS=-mcpu=cortex-a72+crypto -march=armv8-a+crypto -mtune=cortex-a72
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CFLAGS+=$(ARCH_FLAGS) -DCORTEX_A72
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CFLAGS+=-DWOLFBOOT_DUALBOOT
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# Support detection and skip of U-Boot legacy header
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CFLAGS+=-DWOLFBOOT_UBOOT_LEGACY
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endif
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ifeq ($(DEBUG_UART),0)
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CFLAGS+=-fno-builtin-printf
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endif
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ifeq ($(TARGET),nxp_ls1028a)
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ARCH_FLAGS=-mcpu=cortex-a72+crypto -march=armv8-a+crypto -mtune=cortex-a72
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CFLAGS+=$(ARCH_FLAGS) -DCORTEX_A72
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SPI_TARGET=nxp
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else
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# By default disable ARM ASM for other targets
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NO_ARM_ASM?=1
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CFLAGS +=-ffunction-sections -fdata-sections
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LDFLAGS+=-Wl,--gc-sections
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ifeq ($(DEBUG_UART),0)
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CFLAGS+=-fno-builtin-printf
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endif
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SPI_TARGET=nxp
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endif
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# Default ARM ASM setting for unrecognized AARCH64 targets
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ifeq ($(filter zynq versal nxp_ls1028a,$(TARGET)),)
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NO_ARM_ASM?=1
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endif
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ifeq ($(SPMATH),1)

‎config/examples/versal_vmk180.config‎

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# wolfBoot configuration for AMD Versal VMK180 - DDR Boot (U-Boot Replacement)
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# Versal Prime VM1802 ACAP - Dual ARM Cortex-A72
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#
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# This configuration replaces U-Boot in the Versal boot flow:
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# PLM -> PSM -> BL31 (EL3) -> wolfBoot (EL2) -> Linux (EL1)
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#
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# wolfBoot entry point is 0x8000000 in DDR, running at EL2 (non-secure)
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# All clock, MIO, and DDR initialization is done by PLM/PSM before wolfBoot starts
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ARCH?=AARCH64
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TARGET?=versal
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WOLFBOOT_VERSION?=1
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# ECC-384 with SHA-384 (good balance of security and performance)
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SIGN?=ECC384
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HASH?=SHA384
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IMAGE_HEADER_SIZE?=512
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# RSA 4096-bit with SHA3-384 (alternative)
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#SIGN?=RSA4096
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#HASH?=SHA3
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#IMAGE_HEADER_SIZE?=1024
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# Debug options
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DEBUG?=1
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DEBUG_SYMBOLS=1
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DEBUG_UART=1
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VTOR?=1
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CORTEX_M0?=0
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NO_ASM?=0
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ALLOW_DOWNGRADE?=0
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NVM_FLASH_WRITEONCE?=0
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V?=0
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SPMATH?=1
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RAM_CODE?=0
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DUALBANK_SWAP?=0
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PKA?=0
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WOLFTPM?=0
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# Flash configuration
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EXT_FLASH?=1
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NO_XIP=1
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# ELF loading support
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ELF?=1
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# Toolchain
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USE_GCC=1
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CROSS_COMPILE=aarch64-none-elf-
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# ============================================================================
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# Boot Memory Layout
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# ============================================================================
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# wolfBoot runs from DDR at 0x8000000 (same address as U-Boot)
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# This matches the partition header from PetaLinux BOOT.BIN:
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# exec_addr: 0x08000000, load_addr: 0x08000000
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# EL: el-2, trustzone: non-secure, aarch-64
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WOLFBOOT_ORIGIN=0x8000000
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# Optional debugging with OCRAM
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# Versal Gen 1 (VMK180): OCM is 256KB at 0xFFFC0000 - 0xFFFFFFFF
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# Versal Gen 2: OCM is 2MB at 0xFFE00000 - 0xFFFFFFFF
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#WOLFBOOT_ORIGIN=0xFFFC0000
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# Flash Sector Size (QSPI)
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WOLFBOOT_SECTOR_SIZE=0x20000
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# Application Partition Size (44MB)
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WOLFBOOT_PARTITION_SIZE=0x2C00000
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# Location in Flash for Primary Boot Partition
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WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x800000
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# Load Partition to RAM Address (Linux kernel loads here)
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WOLFBOOT_LOAD_ADDRESS?=0x10000000
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# Location in Flash for Secondary Partition (update image)
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WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x3400000
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# Location to store wolfBoot state/swap
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WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x6000000
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# DTS (Device Tree) - matches addresses from BOOT.BIN analysis
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WOLFBOOT_LOAD_DTS_ADDRESS?=0x1000
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WOLFBOOT_DTS_BOOT_ADDRESS?=0x7B0000
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WOLFBOOT_DTS_UPDATE_ADDRESS?=0x39B0000
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# Speed up reads by using larger blocks
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CFLAGS_EXTRA+=-DWOLFBOOT_SHA_BLOCK_SIZE=4096
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# UART Configuration - UART0 for APU console
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CFLAGS_EXTRA+=-DDEBUG_UART_NUM=0

‎docs/Targets.md‎

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@@ -49,6 +49,7 @@ This README describes configuration of supported targets.
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* [TI Hercules TMS570LC435](#ti-hercules-tms570lc435)
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* [Vorago VA416x0](#vorago-va416x0)
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* [Xilinx Zynq UltraScale](#xilinx-zynq-ultrascale)
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* [Versal Gen 1 VMK180](#versal-gen-1-vmk180)
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## STM32F4
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@@ -1978,6 +1979,123 @@ qemu-system-aarch64 -machine xlnx-zcu102 -cpu cortex-a53 -serial stdio -display
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`tools/keytools/sign --rsa4096 --sha3 /srv/linux-rpi4/vmlinux.bin wolfboot_signing_private_key.der 1`
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## Versal Gen 1 VMK180
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AMD Versal Prime VM1802 ACAP - Dual ARM Cortex-A72 (VMK180 Evaluation Board)
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wolfBoot replaces U-Boot in the Versal boot flow:
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```
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PLM -> PSM -> BL31 (EL3) -> wolfBoot (EL2) -> Linux (EL1)
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```
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wolfBoot runs from DDR at address `0x8000000` at EL2 (non-secure). All clock, MIO, and DDR initialization is handled by PLM/PSM before wolfBoot starts.
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See example configuration file at `config/examples/versal_vmk180.config`.
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### Prerequisites
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1. **Xilinx Vitis 2024.1 or 2024.2** (required for bootgen - 2025.1 or later has QSPI boot issues)
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- Set `VITIS_PATH` environment variable: `export VITIS_PATH=/opt/Xilinx/Vitis/2024.1`
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2. **Toolchain**
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- ARM GCC toolchain: `aarch64-none-elf-gcc`
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### Configuration Options
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Key configuration options in `config/examples/versal_vmk180.config`:
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- `ARCH=AARCH64` - ARM 64-bit architecture
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- `TARGET=versal` - Versal platform target
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- `WOLFBOOT_ORIGIN=0x8000000` - Entry point in DDR
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- `WOLFBOOT_SECTOR_SIZE=0x20000` - QSPI flash sector size (128KB)
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- `WOLFBOOT_PARTITION_SIZE=0x2C00000` - Application partition size (44MB)
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- `EXT_FLASH=1` - External flash support
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- `ELF=1` - ELF loading support
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### Memory Layout
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| Partition | Size | Address | Description |
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|-------------|--------|---------|-------------|
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| Bootloader | - | 0x8000000 | wolfBoot in DDR (loaded by BL31) |
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| Primary | 44MB | 0x800000 | Boot partition in QSPI |
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| Update | 44MB | 0x3400000 | Update partition in QSPI |
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| Swap | - | 0x6000000 | Swap area in QSPI |
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### Debugging
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For debugging with OCRAM (OCM), set `WOLFBOOT_ORIGIN=0xFFFC0000` in the config file. Versal Gen 1 OCM is 256KB at `0xFFFC0000 - 0xFFFFFFFF`.
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### Building wolfBoot
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Build wolfBoot from the wolfBoot root directory:
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```sh
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cp config/examples/versal_vmk180.config .config
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make clean
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make
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```
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### Building BOOT.BIN
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If you don't already have prebuilt firmware, clone the Xilinx prebuilt firmware repository:
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```sh
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git clone --branch xlnx_rel_v2024.1 https://github.com/Xilinx/soc-prebuilt-firmware.git
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export PREBUILT_DIR=$(pwd)/../soc-prebuilt-firmware/vmk180-versal
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```
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Copy the required files into wolfboot root directory:
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```sh
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cp ${PREBUILT_DIR}/project_1.pdi .
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cp ${PREBUILT_DIR}/plm.elf .
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cp ${PREBUILT_DIR}/psmfw.elf .
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cp ${PREBUILT_DIR}/bl31.elf .
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cp ${PREBUILT_DIR}/system-default.dtb .
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```
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Source the Vitis environment and generate BOOT.BIN using bootgen:
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```sh
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source ${VITIS_PATH}/settings64.sh
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bootgen -arch versal -image ./tools/scripts/vmk180/boot_wolfboot.bif -w -o BOOT.BIN
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```
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The BIF file (`boot_wolfboot.bif`) references files using relative paths in the same directory. After successful generation, `BOOT.BIN` will be created in `tools/scripts/vmk180/`.
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### Flashing QSPI
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Flash `BOOT.BIN` to QSPI flash using one of the following methods:
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- **Vitis**: Use the Hardware Manager to program the QSPI flash via JTAG. Load `BOOT.BIN` and program to QSPI32 flash memory.
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- **Lauterbach**: Use Trace32 to program QSPI flash via JTAG. Load `BOOT.BIN` and write to QSPI flash memory addresses.
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- **U-Boot via SD Card**: Boot from SD card with U-Boot, then use TFTP to download `BOOT.BIN` and program QSPI flash:
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```sh
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tftp ${loadaddr} BOOT.BIN
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sf probe 0 0 0
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sf erase 0 +${filesize}
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sf write ${loadaddr} 0 ${filesize}
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```
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### Example Boot Output
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```
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========================================
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wolfBoot Secure Boot - AMD Versal
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========================================
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Current EL: 2
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Timer Freq: 99999904 Hz
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ext_flash_read: STUB
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ext_flash_read: STUB
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Versions: Boot 0, Update 0
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No valid image found!
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wolfBoot: PANIC!
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```
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19812099
## Cypress PSoC-6
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The Cypress PSoC 62S2 is a dual-core Cortex-M4 & Cortex-M0+ MCU. The secure boot process is managed by the M0+.

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