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pci: add comments to clarify bridge alignment constraints
1 parent 0cfa11f commit 04288e9

1 file changed

Lines changed: 6 additions & 1 deletion

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src/pci.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -615,6 +615,8 @@ static int pci_program_bridge(uint8_t bus, uint8_t dev, uint8_t fun,
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* (curr_bus_number,0xff) to scan the bus behind the bridge */
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pci_config_write8(bus, dev, fun, PCI_SUB_SEC_BUS, 0xff);
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/* PCI bridge window registers enforce alignment constraints from the spec:
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* prefetch and MMIO windows are 1MB-aligned, IO windows are 4KB-aligned. */
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ret = pci_align_check_up(info->mem_pf, ONE_MB,
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info->mem_pf_limit,
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&prefetch_start);
@@ -643,7 +645,10 @@ static int pci_program_bridge(uint8_t bus, uint8_t dev, uint8_t fun,
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* bridge */
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pci_config_write8(bus, dev, fun, PCI_SUB_SEC_BUS, info->curr_bus_number);
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/* upate prefetch range */
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/* PCI bridge window registers enforce alignment constraints from the spec:
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* prefetch and MMIO windows are 1MB-aligned, IO windows are 4KB-aligned.
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* After enumeration, the end of each window must also be aligned up to meet
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* these granularity requirements. */
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if (prefetch_start != info->mem_pf) {
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ret = pci_align_check_up(info->mem_pf, ONE_MB,
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info->mem_pf_limit,

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