From 13d023f58f0571ec1c4c3e06b67a1d29692a25e8 Mon Sep 17 00:00:00 2001 From: Frank Barchard Date: Tue, 28 Apr 2026 13:09:46 -0700 Subject: [PATCH] Add Cortex-A320 to MIDR decode table ARM Cortex-A320 (MIDR part 0xD8F) is an ARMv9.2-A efficiency core. Add its uarch enum and MIDR mapping. Co-authored-by: Nicolas Pitre --- include/cpuinfo.h | 2 ++ src/arm/uarch.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/include/cpuinfo.h b/include/cpuinfo.h index 321998c5..381018da 100644 --- a/include/cpuinfo.h +++ b/include/cpuinfo.h @@ -525,6 +525,8 @@ enum cpuinfo_uarch { cpuinfo_uarch_cortex_a510 = 0x00300551, /** ARM Cortex-A520. */ cpuinfo_uarch_cortex_a520 = 0x00300552, + /** ARM Cortex-A320. */ + cpuinfo_uarch_cortex_a320 = 0x00300553, /** ARM Cortex-A710. */ cpuinfo_uarch_cortex_a710 = 0x00300571, /** ARM Cortex-A715. */ diff --git a/src/arm/uarch.c b/src/arm/uarch.c index 6f92c7d2..83a0b439 100644 --- a/src/arm/uarch.c +++ b/src/arm/uarch.c @@ -141,6 +141,9 @@ void cpuinfo_arm_decode_vendor_uarch( case 0xD87: /* Cortex-A725 */ *uarch = cpuinfo_uarch_cortex_a725; break; + case 0xD8F: /* Cortex-A320 */ + *uarch = cpuinfo_uarch_cortex_a320; + break; case 0xD8C: *uarch = cpuinfo_uarch_lumex_c1_ultra; break;