ppcopcodes: Add emulation of THRMn registers.

Required for booting Mac OS 9.2.2 on iMac.

Author: joevt

cpu/ppc/ppcemu.h

@@ -126,6 +126,9 @@ enum SPR : int {
     SDA     = 959,
     HID0    = 1008,
     HID1    = 1009,
+    THRM1   = 1020,
+    THRM2   = 1021,
+    THRM3   = 1022,
 };
 
 /** symbolic names for common PPC processors */
@@ -378,6 +381,7 @@ void p_power_off(const char* file, int line, Po_Cause new_reason);
 
 extern bool int_pin;
 extern bool dec_exception_pending;
+extern bool thrm_exception_pending;
 
 extern bool is_601;        // For PowerPC 601 Emulation
 extern bool include_601;   // For non-PowerPC 601 emulation with 601 extras

cpu/ppc/ppcexceptions.cpp

@@ -63,6 +63,7 @@ void ppc_exception_handler(Except_Type exception_type, uint32_t srr1_bits) {
 
     case Except_Type::EXC_EXT_INT:
     case Except_Type::EXC_DECR:
+    case Except_Type::EXC_THRM_MGMT_INT:
         if (exec_flags & ~EXEF_OPC_DECODER) {
             ppc_state.spr[SPR::SRR0] = ppc_next_instruction_address;
         } else {
@@ -171,6 +172,10 @@ void ppc_exception_handler(Except_Type exception_type, uint32_t srr1_bits) {
         exc_descriptor = "Trace exception occurred";
         break;
 
+    case Except_Type::EXC_THRM_MGMT_INT:
+        exc_descriptor = "Thermal management interrupt exception occurred";
+        break;
+
     default:
         char buffer[100];
         snprintf(buffer, sizeof(buffer), "Exception 0x%X occurred", int(exception_type));

cpu/ppc/ppcexec.cpp

@@ -128,6 +128,7 @@ unsigned exec_flags; // execution control flags
 volatile bool exec_timer;
 bool int_pin = false; // interrupt request pin state: true - asserted
 bool dec_exception_pending = false;
+bool thrm_exception_pending = false;
 
 /* variables related to virtual time */
 bool g_realtime = false;
@@ -1110,7 +1111,7 @@ static map<string, int> SPRName2Num = {
     {"DBAT2L", 541},            {"DBAT3U", 542},        {"DBAT3L", 543},
     {"HID0",   SPR::HID0},      {"HID1",   SPR::HID1},  {"IABR",   1010},
     {"DABR",   1013},           {"L2CR",   1017},       {"ICTC",   1019},
-    {"THRM1",  1020},           {"THRM2",  1021},       {"THRM3",  1022},
+    {"THRM1",  SPR::THRM1},     {"THRM2",  SPR::THRM2}, {"THRM3",  SPR::THRM3},
     {"PIR",    1023},           {"TBL",    SPR::TBL_S}, {"TBU",    SPR::TBU_S},
     {"SDR1",   SPR::SDR1},      {"MQ",     SPR::MQ},    {"RTCU",   SPR::RTCU_S},
     {"RTCL",   SPR::RTCL_S},    {"DSISR",  SPR::DSISR}, {"DAR",    SPR::DAR},

cpu/ppc/ppcopcodes.cpp

@@ -31,6 +31,9 @@ along with this program.  If not, see <https://www.gnu.org/licenses/>.
 #include <cinttypes>
 #include <vector>
 
+static int junction_temperature = 24;
+static TimerInfo thermal_timer;
+
 //Extract the registers desired and the values of the registers.
 
 // Affects CR Field 0 - For integer operations
@@ -820,6 +823,9 @@ void dppc_interpreter::ppc_mtmsr(uint32_t opcode) {
         dec_exception_pending = false;
         //LOG_F(WARNING, "MTMSR: decrementer exception triggered");
         ppc_exception_handler(Except_Type::EXC_DECR, 0);
+    } else if ((ppc_state.msr & MSR::EE) && thrm_exception_pending) {
+        thrm_exception_pending = false;
+        ppc_exception_handler(Except_Type::EXC_THRM_MGMT_INT, 0);
     } else if (ppc_state.msr & MSR::POW) [[unlikely]] {
         bool enter_sleep = false;
 
@@ -980,6 +986,48 @@ static void update_decrementer(bool update_time_stamp, uint32_t oldval, uint32_t
     );
 }
 
+static void update_thermal(uint64_t, uint64_t) {
+    thermal_timer.active = 0;
+
+    uint32_t val = ppc_state.spr[SPR::THRM3];
+    auto sampled_interval_timer_value = (val >> 1) & 0x1FFF;
+    auto enabled = val & 1;
+
+    bool interrupt = false;
+    for (int the_reg = 0; the_reg < 2; the_reg++) {
+        val = ppc_state.spr[SPR::THRM1 + the_reg];
+        uint32_t t_interrupt; // = (val >> 31) &    1;
+        uint32_t t_int_valid; // = (val >> 30) &    1;
+        uint32_t threshold       = (val >> 23) & 0x7F;
+        uint32_t t_int_direction = (val >>  2) &    1;
+        uint32_t t_int_enable    = (val >>  1) &    1;
+        uint32_t valid           = (val >>  0) &    1;
+        
+        if (!valid) {
+            t_interrupt = 0;
+            t_int_valid = 0;
+        } else {
+            t_interrupt = t_int_direction ?
+                junction_temperature < threshold
+            :
+                junction_temperature > threshold;
+            t_int_valid = 1;
+            interrupt |= t_int_enable && t_interrupt;
+        }
+        ppc_state.spr[SPR::THRM1 + the_reg] = (t_interrupt << 31) | (t_int_valid << 30) | (val & 0x3FFFFFFF);
+    }
+
+    if (interrupt && enabled) {
+        if (ppc_state.msr & MSR::EE) {
+            thrm_exception_pending = false;
+            ppc_exception_handler(Except_Type::EXC_THRM_MGMT_INT, 0);
+        }
+        else {
+            thrm_exception_pending = true;
+        }
+    }
+}
+
 void dppc_interpreter::ppc_mfspr(uint32_t opcode) {
     ppc_grab_dab(opcode);
     uint32_t ref_spr = (reg_b << 5) | reg_a;
@@ -1052,6 +1100,15 @@ void dppc_interpreter::ppc_mfspr(uint32_t opcode) {
         ppc_state.spr[TBL_S] = uint32_t(tbr_value);
         break;
     }
+    case SPR::THRM1:
+    case SPR::THRM2: {
+        uint32_t val = ppc_state.spr[ref_spr];
+        ppc_state.gpr[reg_d] = val;
+        break;
+    }
+    case SPR::THRM3:
+        ppc_state.gpr[reg_d] = ppc_state.spr[ref_spr];
+        break;
     default:
         // FIXME: Unknown SPR should be noop or illegal instruction.
         ppc_state.gpr[reg_d] = ppc_state.spr[ref_spr];
@@ -1157,6 +1214,25 @@ void dppc_interpreter::ppc_mtspr(uint32_t opcode) {
             ppc_change_endian((val & 0x10000000) != 0);
         }
         break;
+    case SPR::THRM1:
+    case SPR::THRM2: {
+        ppc_state.spr[ref_spr] = val & 0x3F800007;
+
+        if (thermal_timer.active)
+            TimerManager::get_instance()->cancel_timer(thermal_timer);
+        TimerManager::get_instance()->add_oneshot_timer(thermal_timer, USECS_TO_NSECS(20), update_thermal);
+        break;
+    }
+    case SPR::THRM3: {
+        ppc_state.spr[ref_spr] = val & 0x00003FFF;
+        ppc_state.spr[SPR::THRM1] &= ~(3<<30);
+        ppc_state.spr[SPR::THRM2] &= ~(3<<30);
+
+        if (thermal_timer.active)
+            TimerManager::get_instance()->cancel_timer(thermal_timer);
+        TimerManager::get_instance()->add_oneshot_timer(thermal_timer, USECS_TO_NSECS(20), update_thermal);
+        break;
+    }
     default:
         // FIXME: Unknown SPR should be noop or illegal instruction.
         ppc_state.spr[ref_spr] = val;
@@ -1518,14 +1594,18 @@ void dppc_interpreter::ppc_rfi(uint32_t opcode) {
     ppc_msr_did_change(ppc_state.msr, new_msr_val);
 
     // setting MSR[EE] may enable pending exceptions
-    if ((ppc_state.msr & MSR::EE) && (int_pin || dec_exception_pending)) {
+    if ((ppc_state.msr & MSR::EE) && (int_pin || dec_exception_pending || thrm_exception_pending)) {
         uint32_t save_srr0 = ppc_state.spr[SPR::SRR0] & ~3UL;
         if (int_pin) // check for pending external exceptions (higher priority)
             ppc_exception_handler(Except_Type::EXC_EXT_INT, 0);
-        else {
+        else if (dec_exception_pending) {
             dec_exception_pending = false;
             ppc_exception_handler(Except_Type::EXC_DECR, 0);
         }
+        else if (thrm_exception_pending) {
+            thrm_exception_pending = false;
+            ppc_exception_handler(Except_Type::EXC_THRM_MGMT_INT, 0);
+        }
         ppc_state.spr[SPR::SRR0] = save_srr0;
         return;
     }