PM / devfreq: tegra30: Improve initial hardware resetting

It's safe to enable the ACTMON clock at any time during driver probing,
even if we don't know the state of hardware, because it's used only for
collecting and processing stats, and interrupt is kept disabled. This
allows us to slightly improve code which performs initial hardware
resetting by making use of a single reset_control_reset() instead of
assert/deassert pair. Secondly, a potential error of the reset-control
API is handled nicely now.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>

Author: digetx

drivers/devfreq/tegra30-devfreq.c

@@ -822,16 +822,18 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
 		return err;
 	}
 
-	reset_control_assert(tegra->reset);
-
 	err = clk_prepare_enable(tegra->clock);
 	if (err) {
 		dev_err(&pdev->dev,
 			"Failed to prepare and enable ACTMON clock\n");
 		return err;
 	}
 
-	reset_control_deassert(tegra->reset);
+	err = reset_control_reset(tegra->reset);
+	if (err) {
+		dev_err(&pdev->dev, "Failed to reset hardware: %d\n", err);
+		goto disable_clk;
+	}
 
 	rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
 	if (rate < 0) {