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Merge tag 'linux-watchdog-5.9-rc1' of git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck: - f71808e_wdt imporvements - dw_wdt improvements - mlx-wdt: support new watchdog type with longer timeout period - fallthrough pseudo-keyword replacements - overall small fixes and improvements * tag 'linux-watchdog-5.9-rc1' of git://www.linux-watchdog.org/linux-watchdog: (35 commits) watchdog: rti-wdt: balance pm runtime enable calls watchdog: rti-wdt: attach to running watchdog during probe watchdog: add support for adjusting last known HW keepalive time watchdog: use __watchdog_ping in startup watchdog: softdog: Add options 'soft_reboot_cmd' and 'soft_active_on_boot' watchdog: pcwd_usb: remove needless check before usb_free_coherent() watchdog: Replace HTTP links with HTTPS ones dt-bindings: watchdog: renesas,wdt: Document r8a774e1 support watchdog: initialize device before misc_register watchdog: booke_wdt: Add common nowayout parameter driver watchdog: scx200_wdt: Use fallthrough pseudo-keyword watchdog: Use fallthrough pseudo-keyword watchdog: f71808e_wdt: do stricter parameter validation watchdog: f71808e_wdt: clear watchdog timeout occurred flag watchdog: f71808e_wdt: remove use of wrong watchdog_info option watchdog: f71808e_wdt: indicate WDIOF_CARDRESET support in watchdog_info.options docs: watchdog: codify ident.options as superset of possible status flags dt-bindings: watchdog: Add compatible for QCS404, SC7180, SDM845, SM8150 dt-bindings: watchdog: Convert QCOM watchdog timer bindings to YAML watchdog: dw_wdt: Add DebugFS files ...
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‎Documentation/devicetree/bindings/watchdog/davinci-wdt.txt‎

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See clock-bindings.txt
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Documentation:
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Davinci DM646x - http://www.ti.com/lit/ug/spruer5b/spruer5b.pdf
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Keystone - http://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
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Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf
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Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf
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Examples:
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‎Documentation/devicetree/bindings/watchdog/dw_wdt.txt‎

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‎Documentation/devicetree/bindings/watchdog/qcom-wdt.txt‎

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‎Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/qcom-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Krait Processor Sub-system (KPSS) Watchdog timer
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maintainers:
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- Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
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allOf:
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- $ref: watchdog.yaml#
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properties:
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compatible:
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enum:
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- qcom,apss-wdt-qcs404
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- qcom,apss-wdt-sc7180
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- qcom,apss-wdt-sdm845
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- qcom,apss-wdt-sm8150
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- qcom,kpss-timer
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- qcom,kpss-wdt
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- qcom,kpss-wdt-apq8064
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- qcom,kpss-wdt-ipq4019
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- qcom,kpss-wdt-ipq8064
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- qcom,kpss-wdt-msm8960
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- qcom,scss-timer
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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examples:
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- |
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watchdog@208a038 {
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compatible = "qcom,kpss-wdt-ipq8064";
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reg = <0x0208a038 0x40>;
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clocks = <&sleep_clk>;
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timeout-sec = <10>;
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};

‎Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml‎

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- renesas,r8a774a1-wdt # RZ/G2M
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- renesas,r8a774b1-wdt # RZ/G2N
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- renesas,r8a774c0-wdt # RZ/G2E
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- renesas,r8a774e1-wdt # RZ/G2H
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- renesas,r8a7795-wdt # R-Car H3
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- renesas,r8a7796-wdt # R-Car M3-W
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- renesas,r8a77961-wdt # R-Car M3-W+

‎Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Synopsys Designware Watchdog Timer
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allOf:
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- $ref: "watchdog.yaml#"
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maintainers:
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- Jamie Iles <jamie@jamieiles.com>
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properties:
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compatible:
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const: snps,dw-wdt
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reg:
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maxItems: 1
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interrupts:
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description: DW Watchdog pre-timeout interrupt
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maxItems: 1
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clocks:
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minItems: 1
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items:
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- description: Watchdog timer reference clock
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- description: APB3 interface clock
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clock-names:
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minItems: 1
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items:
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- const: tclk
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- const: pclk
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resets:
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description: Phandle to the DW Watchdog reset lane
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maxItems: 1
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snps,watchdog-tops:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description: |
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DW APB Watchdog custom timer intervals - Timeout Period ranges (TOPs).
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Each TOP is a number loaded into the watchdog counter at the moment of
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the timer restart. The counter decrementing happens each tick of the
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reference clock. Therefore the TOPs array is equivalent to an array of
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the timer expiration intervals supported by the DW APB Watchdog. Note
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DW APB Watchdog IP-core might be synthesized with fixed TOP values,
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in which case this property is unnecessary with default TOPs utilized.
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default: [0x0001000 0x0002000 0x0004000 0x0008000
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0x0010000 0x0020000 0x0040000 0x0080000
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0x0100000 0x0200000 0x0400000 0x0800000
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0x1000000 0x2000000 0x4000000 0x8000000]
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minItems: 16
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maxItems: 16
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- clocks
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examples:
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- |
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watchdog@ffd02000 {
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compatible = "snps,dw-wdt";
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reg = <0xffd02000 0x1000>;
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interrupts = <0 171 4>;
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clocks = <&per_base_clk>;
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resets = <&wdt_rst>;
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};
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- |
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watchdog@ffd02000 {
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compatible = "snps,dw-wdt";
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reg = <0xffd02000 0x1000>;
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interrupts = <0 171 4>;
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clocks = <&per_base_clk>;
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clock-names = "tclk";
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snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
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0x000007FF 0x0000FFFF 0x0001FFFF
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0x0003FFFF 0x0007FFFF 0x000FFFFF
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0x001FFFFF 0x003FFFFF 0x007FFFFF
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0x00FFFFFF 0x01FFFFFF 0x03FFFFFF
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0x07FFFFFF>;
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};
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...

‎Documentation/watchdog/mlx-wdt.rst‎

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Maximum timeout is 255 sec.
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Get time-left is supported.
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Type 3:
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Same as Type 2 with extended maximum timeout period.
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Maximum timeout is 65535 sec.
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Type 1 HW watchdog implementation exist in old systems and
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all new systems have type 2 HW watchdog.
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Two types of HW implementation have also different register map.
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Type 3 HW watchdog implementation can exist on all Mellanox systems
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with new programmer logic device.
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It's differentiated by WD capability bit.
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Old systems still have only one main watchdog.
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Mellanox system can have 2 watchdogs: main and auxiliary.
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Main and auxiliary watchdog devices can be enabled together
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on the same system.
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was done by the watchdog. If yes, it makes a notification about this event.
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Access to HW registers is performed through a generic regmap interface.
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Programmable logic device registers have little-endian order.

‎Documentation/watchdog/watchdog-api.rst‎

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the options field can have the following bits set, and describes what
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kind of information that the GET_STATUS and GET_BOOT_STATUS ioctls can
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return. [FIXME -- Is this correct?]
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return.
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================ =========================
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WDIOF_OVERHEAT Reset due to CPU overheat

‎Documentation/watchdog/watchdog-kernel-api.rst‎

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the watchdog device. If watchdog pretimeout governor framework is not
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enabled, watchdog_notify_pretimeout() prints a notification message to
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the kernel log buffer.
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To set the last known HW keepalive time for a watchdog, the following function
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should be used::
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int watchdog_set_last_hw_keepalive(struct watchdog_device *wdd,
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unsigned int last_ping_ms)
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This function must be called immediately after watchdog registration. It
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sets the last known hardware heartbeat to have happened last_ping_ms before
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current time. Calling this is only needed if the watchdog is already running
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when probe is called, and the watchdog can only be pinged after the
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min_hw_heartbeat_ms time has passed from the last ping.

‎MAINTAINERS‎

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M: Julius Werner <jwerner@chromium.org>
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R: Evan Benn <evanbenn@chromium.org>
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S: Maintained
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F: devicetree/bindings/watchdog/arm-smc-wdt.yaml
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F: Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml
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F: drivers/watchdog/arm_smc_wdt.c
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ARM SMMU DRIVERS

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