6464#define gpio_range_to_bank (chip ) \
6565 container_of(chip, struct stm32_gpio_bank, range)
6666
67- #define HWSPINLOCK_TIMEOUT 5 /* msec */
67+ #define HWSPNLCK_TIMEOUT 1000 /* usec */
6868
6969static const char * const stm32_gpio_functions [] = {
7070 "gpio" , "af0" , "af1" ,
@@ -422,20 +422,22 @@ static int stm32_gpio_domain_activate(struct irq_domain *d,
422422 * to avoid overriding.
423423 */
424424 spin_lock_irqsave (& pctl -> irqmux_lock , flags );
425- if (pctl -> hwlock )
426- ret = hwspin_lock_timeout (pctl -> hwlock , HWSPINLOCK_TIMEOUT );
427425
428- if (ret ) {
429- dev_err (pctl -> dev , "Can't get hwspinlock\n" );
430- goto unlock ;
426+ if (pctl -> hwlock ) {
427+ ret = hwspin_lock_timeout_in_atomic (pctl -> hwlock ,
428+ HWSPNLCK_TIMEOUT );
429+ if (ret ) {
430+ dev_err (pctl -> dev , "Can't get hwspinlock\n" );
431+ goto unlock ;
432+ }
431433 }
432434
433435 if (pctl -> irqmux_map & BIT (irq_data -> hwirq )) {
434436 dev_err (pctl -> dev , "irq line %ld already requested.\n" ,
435437 irq_data -> hwirq );
436438 ret = - EBUSY ;
437439 if (pctl -> hwlock )
438- hwspin_unlock (pctl -> hwlock );
440+ hwspin_unlock_in_atomic (pctl -> hwlock );
439441 goto unlock ;
440442 } else {
441443 pctl -> irqmux_map |= BIT (irq_data -> hwirq );
@@ -444,7 +446,7 @@ static int stm32_gpio_domain_activate(struct irq_domain *d,
444446 regmap_field_write (pctl -> irqmux [irq_data -> hwirq ], bank -> bank_ioport_nr );
445447
446448 if (pctl -> hwlock )
447- hwspin_unlock (pctl -> hwlock );
449+ hwspin_unlock_in_atomic (pctl -> hwlock );
448450
449451unlock :
450452 spin_unlock_irqrestore (& pctl -> irqmux_lock , flags );
@@ -752,12 +754,13 @@ static int stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
752754 clk_enable (bank -> clk );
753755 spin_lock_irqsave (& bank -> lock , flags );
754756
755- if (pctl -> hwlock )
756- err = hwspin_lock_timeout (pctl -> hwlock , HWSPINLOCK_TIMEOUT );
757-
758- if (err ) {
759- dev_err (pctl -> dev , "Can't get hwspinlock\n" );
760- goto unlock ;
757+ if (pctl -> hwlock ) {
758+ err = hwspin_lock_timeout_in_atomic (pctl -> hwlock ,
759+ HWSPNLCK_TIMEOUT );
760+ if (err ) {
761+ dev_err (pctl -> dev , "Can't get hwspinlock\n" );
762+ goto unlock ;
763+ }
761764 }
762765
763766 val = readl_relaxed (bank -> base + alt_offset );
@@ -771,7 +774,7 @@ static int stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
771774 writel_relaxed (val , bank -> base + STM32_GPIO_MODER );
772775
773776 if (pctl -> hwlock )
774- hwspin_unlock (pctl -> hwlock );
777+ hwspin_unlock_in_atomic (pctl -> hwlock );
775778
776779 stm32_gpio_backup_mode (bank , pin , mode , alt );
777780
@@ -871,12 +874,13 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
871874 clk_enable (bank -> clk );
872875 spin_lock_irqsave (& bank -> lock , flags );
873876
874- if (pctl -> hwlock )
875- err = hwspin_lock_timeout (pctl -> hwlock , HWSPINLOCK_TIMEOUT );
876-
877- if (err ) {
878- dev_err (pctl -> dev , "Can't get hwspinlock\n" );
879- goto unlock ;
877+ if (pctl -> hwlock ) {
878+ err = hwspin_lock_timeout_in_atomic (pctl -> hwlock ,
879+ HWSPNLCK_TIMEOUT );
880+ if (err ) {
881+ dev_err (pctl -> dev , "Can't get hwspinlock\n" );
882+ goto unlock ;
883+ }
880884 }
881885
882886 val = readl_relaxed (bank -> base + STM32_GPIO_TYPER );
@@ -885,7 +889,7 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
885889 writel_relaxed (val , bank -> base + STM32_GPIO_TYPER );
886890
887891 if (pctl -> hwlock )
888- hwspin_unlock (pctl -> hwlock );
892+ hwspin_unlock_in_atomic (pctl -> hwlock );
889893
890894 stm32_gpio_backup_driving (bank , offset , drive );
891895
@@ -925,12 +929,13 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
925929 clk_enable (bank -> clk );
926930 spin_lock_irqsave (& bank -> lock , flags );
927931
928- if (pctl -> hwlock )
929- err = hwspin_lock_timeout (pctl -> hwlock , HWSPINLOCK_TIMEOUT );
930-
931- if (err ) {
932- dev_err (pctl -> dev , "Can't get hwspinlock\n" );
933- goto unlock ;
932+ if (pctl -> hwlock ) {
933+ err = hwspin_lock_timeout_in_atomic (pctl -> hwlock ,
934+ HWSPNLCK_TIMEOUT );
935+ if (err ) {
936+ dev_err (pctl -> dev , "Can't get hwspinlock\n" );
937+ goto unlock ;
938+ }
934939 }
935940
936941 val = readl_relaxed (bank -> base + STM32_GPIO_SPEEDR );
@@ -939,7 +944,7 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
939944 writel_relaxed (val , bank -> base + STM32_GPIO_SPEEDR );
940945
941946 if (pctl -> hwlock )
942- hwspin_unlock (pctl -> hwlock );
947+ hwspin_unlock_in_atomic (pctl -> hwlock );
943948
944949 stm32_gpio_backup_speed (bank , offset , speed );
945950
@@ -979,12 +984,13 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
979984 clk_enable (bank -> clk );
980985 spin_lock_irqsave (& bank -> lock , flags );
981986
982- if (pctl -> hwlock )
983- err = hwspin_lock_timeout (pctl -> hwlock , HWSPINLOCK_TIMEOUT );
984-
985- if (err ) {
986- dev_err (pctl -> dev , "Can't get hwspinlock\n" );
987- goto unlock ;
987+ if (pctl -> hwlock ) {
988+ err = hwspin_lock_timeout_in_atomic (pctl -> hwlock ,
989+ HWSPNLCK_TIMEOUT );
990+ if (err ) {
991+ dev_err (pctl -> dev , "Can't get hwspinlock\n" );
992+ goto unlock ;
993+ }
988994 }
989995
990996 val = readl_relaxed (bank -> base + STM32_GPIO_PUPDR );
@@ -993,7 +999,7 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
993999 writel_relaxed (val , bank -> base + STM32_GPIO_PUPDR );
9941000
9951001 if (pctl -> hwlock )
996- hwspin_unlock (pctl -> hwlock );
1002+ hwspin_unlock_in_atomic (pctl -> hwlock );
9971003
9981004 stm32_gpio_backup_bias (bank , offset , bias );
9991005
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