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selftests/powerpc: refactor entry and rfi_flush tests
For simplicity in backporting, the original entry_flush test contained a lot of duplicated code from the rfi_flush test. De-duplicate that code. Signed-off-by: Daniel Axtens <dja@axtens.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
1 parent 89a83a0 commit 0d239f3

6 files changed

Lines changed: 96 additions & 120 deletions

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tools/testing/selftests/powerpc/include/utils.h

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@@ -42,6 +42,11 @@ int perf_event_enable(int fd);
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int perf_event_disable(int fd);
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int perf_event_reset(int fd);
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struct perf_event_read {
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__u64 nr;
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__u64 l1d_misses;
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};
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#if !defined(__GLIBC_PREREQ) || !__GLIBC_PREREQ(2, 30)
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#include <unistd.h>
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#include <sys/syscall.h>

tools/testing/selftests/powerpc/security/Makefile

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@@ -11,3 +11,5 @@ $(TEST_GEN_PROGS): ../harness.c ../utils.c
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$(OUTPUT)/spectre_v2: CFLAGS += -m64
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$(OUTPUT)/spectre_v2: ../pmu/event.c branch_loops.S
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$(OUTPUT)/rfi_flush: flush_utils.c
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$(OUTPUT)/entry_flush: flush_utils.c

tools/testing/selftests/powerpc/security/entry_flush.c

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@@ -15,66 +15,7 @@
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#include <string.h>
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#include <stdio.h>
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#include "utils.h"
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#define CACHELINE_SIZE 128
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struct perf_event_read {
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__u64 nr;
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__u64 l1d_misses;
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};
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static inline __u64 load(void *addr)
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{
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__u64 tmp;
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asm volatile("ld %0,0(%1)" : "=r"(tmp) : "b"(addr));
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return tmp;
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}
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static void syscall_loop(char *p, unsigned long iterations,
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unsigned long zero_size)
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{
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for (unsigned long i = 0; i < iterations; i++) {
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for (unsigned long j = 0; j < zero_size; j += CACHELINE_SIZE)
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load(p + j);
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getppid();
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}
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}
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static void sigill_handler(int signr, siginfo_t *info, void *unused)
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{
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static int warned;
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ucontext_t *ctx = (ucontext_t *)unused;
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unsigned long *pc = &UCONTEXT_NIA(ctx);
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/* mtspr 3,RS to check for move to DSCR below */
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if ((*((unsigned int *)*pc) & 0xfc1fffff) == 0x7c0303a6) {
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if (!warned++)
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printf("WARNING: Skipping over dscr setup. Consider running 'ppc64_cpu --dscr=1' manually.\n");
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*pc += 4;
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} else {
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printf("SIGILL at %p\n", pc);
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abort();
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}
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}
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static void set_dscr(unsigned long val)
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{
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static int init;
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struct sigaction sa;
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if (!init) {
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memset(&sa, 0, sizeof(sa));
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sa.sa_sigaction = sigill_handler;
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sa.sa_flags = SA_SIGINFO;
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if (sigaction(SIGILL, &sa, NULL))
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perror("sigill_handler");
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init = 1;
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}
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asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
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}
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#include "flush_utils.h"
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int entry_flush_test(void)
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{
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@@ -0,0 +1,70 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018 IBM Corporation.
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*/
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#define __SANE_USERSPACE_TYPES__
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#include <sys/types.h>
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#include <stdint.h>
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#include <unistd.h>
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#include <signal.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include "utils.h"
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#include "flush_utils.h"
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static inline __u64 load(void *addr)
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{
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__u64 tmp;
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asm volatile("ld %0,0(%1)" : "=r"(tmp) : "b"(addr));
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return tmp;
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}
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void syscall_loop(char *p, unsigned long iterations,
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unsigned long zero_size)
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{
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for (unsigned long i = 0; i < iterations; i++) {
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for (unsigned long j = 0; j < zero_size; j += CACHELINE_SIZE)
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load(p + j);
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getppid();
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}
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}
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static void sigill_handler(int signr, siginfo_t *info, void *unused)
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{
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static int warned;
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ucontext_t *ctx = (ucontext_t *)unused;
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unsigned long *pc = &UCONTEXT_NIA(ctx);
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/* mtspr 3,RS to check for move to DSCR below */
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if ((*((unsigned int *)*pc) & 0xfc1fffff) == 0x7c0303a6) {
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if (!warned++)
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printf("WARNING: Skipping over dscr setup. Consider running 'ppc64_cpu --dscr=1' manually.\n");
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*pc += 4;
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} else {
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printf("SIGILL at %p\n", pc);
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abort();
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}
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}
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void set_dscr(unsigned long val)
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{
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static int init;
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struct sigaction sa;
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if (!init) {
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memset(&sa, 0, sizeof(sa));
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sa.sa_sigaction = sigill_handler;
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sa.sa_flags = SA_SIGINFO;
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if (sigaction(SIGILL, &sa, NULL))
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perror("sigill_handler");
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init = 1;
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}
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asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
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}
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2018 IBM Corporation.
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*/
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#ifndef _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H
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#define _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H
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#define CACHELINE_SIZE 128
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void syscall_loop(char *p, unsigned long iterations,
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unsigned long zero_size);
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void set_dscr(unsigned long val);
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#endif /* _SELFTESTS_POWERPC_SECURITY_FLUSH_UTILS_H */

tools/testing/selftests/powerpc/security/rfi_flush.c

Lines changed: 1 addition & 60 deletions
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@@ -10,71 +10,12 @@
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#include <stdint.h>
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#include <malloc.h>
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#include <unistd.h>
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#include <signal.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdio.h>
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#include "utils.h"
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#include "flush_utils.h"
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#define CACHELINE_SIZE 128
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struct perf_event_read {
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__u64 nr;
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__u64 l1d_misses;
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};
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static inline __u64 load(void *addr)
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{
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__u64 tmp;
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asm volatile("ld %0,0(%1)" : "=r"(tmp) : "b"(addr));
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return tmp;
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}
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static void syscall_loop(char *p, unsigned long iterations,
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unsigned long zero_size)
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{
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for (unsigned long i = 0; i < iterations; i++) {
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for (unsigned long j = 0; j < zero_size; j += CACHELINE_SIZE)
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load(p + j);
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getppid();
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}
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}
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static void sigill_handler(int signr, siginfo_t *info, void *unused)
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{
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static int warned = 0;
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ucontext_t *ctx = (ucontext_t *)unused;
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unsigned long *pc = &UCONTEXT_NIA(ctx);
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/* mtspr 3,RS to check for move to DSCR below */
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if ((*((unsigned int *)*pc) & 0xfc1fffff) == 0x7c0303a6) {
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if (!warned++)
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printf("WARNING: Skipping over dscr setup. Consider running 'ppc64_cpu --dscr=1' manually.\n");
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*pc += 4;
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} else {
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printf("SIGILL at %p\n", pc);
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abort();
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}
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}
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static void set_dscr(unsigned long val)
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{
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static int init = 0;
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struct sigaction sa;
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67-
if (!init) {
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memset(&sa, 0, sizeof(sa));
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sa.sa_sigaction = sigill_handler;
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sa.sa_flags = SA_SIGINFO;
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if (sigaction(SIGILL, &sa, NULL))
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perror("sigill_handler");
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init = 1;
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}
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asm volatile("mtspr %1,%0" : : "r" (val), "i" (SPRN_DSCR));
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}
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int rfi_flush_test(void)
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{

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