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| 1 | +--- a/arch/arm/dts/Makefile |
| 2 | ++++ b/arch/arm/dts/Makefile |
| 3 | +@@ -124,6 +124,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ |
| 4 | + |
| 5 | + dtb-$(CONFIG_ROCKCHIP_RK3328) += \ |
| 6 | + rk3328-evb.dtb \ |
| 7 | ++ rk3328-nanopi-r2c.dtb \ |
| 8 | + rk3328-nanopi-r2s.dtb \ |
| 9 | + rk3328-orangepi-r1-plus.dtb \ |
| 10 | + rk3328-roc-cc.dtb \ |
| 11 | +--- /dev/null |
| 12 | ++++ b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi |
| 13 | +@@ -0,0 +1,7 @@ |
| 14 | ++// SPDX-License-Identifier: GPL-2.0+ |
| 15 | ++/* |
| 16 | ++ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd |
| 17 | ++ * (C) Copyright 2021 Tianling Shen |
| 18 | ++ */ |
| 19 | ++ |
| 20 | ++#include "rk3328-nanopi-r2s-u-boot.dtsi" |
| 21 | +--- /dev/null |
| 22 | ++++ b/arch/arm/dts/rk3328-nanopi-r2c.dts |
| 23 | +@@ -0,0 +1,47 @@ |
| 24 | ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 25 | ++/* |
| 26 | ++ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. |
| 27 | ++ * (http://www.friendlyarm.com) |
| 28 | ++ * |
| 29 | ++ * Copyright (c) 2021 Tianling Shen <cnsztl@immortalwrt.org> |
| 30 | ++ */ |
| 31 | ++ |
| 32 | ++/dts-v1/; |
| 33 | ++ |
| 34 | ++#include "rk3328-nanopi-r2s.dts" |
| 35 | ++ |
| 36 | ++/ { |
| 37 | ++ model = "FriendlyElec NanoPi R2C"; |
| 38 | ++ compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; |
| 39 | ++}; |
| 40 | ++ |
| 41 | ++&gmac2io { |
| 42 | ++ phy-handle = <&yt8521s>; |
| 43 | ++ |
| 44 | ++ mdio { |
| 45 | ++ /delete-node/ ethernet-phy@1; |
| 46 | ++ |
| 47 | ++ yt8521s: ethernet-phy@3 { |
| 48 | ++ compatible = "ethernet-phy-id0000.011a", |
| 49 | ++ "ethernet-phy-ieee802.3-c22"; |
| 50 | ++ reg = <3>; |
| 51 | ++ pinctrl-0 = <ð_phy_reset_pin>; |
| 52 | ++ pinctrl-names = "default"; |
| 53 | ++ reset-assert-us = <10000>; |
| 54 | ++ reset-deassert-us = <50000>; |
| 55 | ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; |
| 56 | ++ }; |
| 57 | ++ }; |
| 58 | ++}; |
| 59 | ++ |
| 60 | ++&lan_led { |
| 61 | ++ label = "nanopi-r2c:green:lan"; |
| 62 | ++}; |
| 63 | ++ |
| 64 | ++&sys_led { |
| 65 | ++ label = "nanopi-r2c:red:sys"; |
| 66 | ++}; |
| 67 | ++ |
| 68 | ++&wan_led { |
| 69 | ++ label = "nanopi-r2c:green:wan"; |
| 70 | ++}; |
| 71 | +--- /dev/null |
| 72 | ++++ b/configs/nanopi-r2c-rk3328_defconfig |
| 73 | +@@ -0,0 +1,103 @@ |
| 74 | ++CONFIG_ARM=y |
| 75 | ++CONFIG_SKIP_LOWLEVEL_INIT=y |
| 76 | ++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 77 | ++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 |
| 78 | ++CONFIG_ARCH_ROCKCHIP=y |
| 79 | ++CONFIG_COUNTER_FREQUENCY=24000000 |
| 80 | ++CONFIG_SYS_TEXT_BASE=0x00200000 |
| 81 | ++CONFIG_SPL_GPIO_SUPPORT=y |
| 82 | ++CONFIG_NR_DRAM_BANKS=1 |
| 83 | ++CONFIG_ENV_OFFSET=0x3F8000 |
| 84 | ++CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c" |
| 85 | ++CONFIG_ROCKCHIP_RK3328=y |
| 86 | ++CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y |
| 87 | ++CONFIG_TPL_LIBCOMMON_SUPPORT=y |
| 88 | ++CONFIG_TPL_LIBGENERIC_SUPPORT=y |
| 89 | ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y |
| 90 | ++CONFIG_SPL_STACK_R_ADDR=0x600000 |
| 91 | ++CONFIG_DEBUG_UART_BASE=0xFF130000 |
| 92 | ++CONFIG_DEBUG_UART_CLOCK=24000000 |
| 93 | ++CONFIG_DEBUG_UART=y |
| 94 | ++CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 |
| 95 | ++CONFIG_SYS_LOAD_ADDR=0x800800 |
| 96 | ++# CONFIG_ANDROID_BOOT_IMAGE is not set |
| 97 | ++CONFIG_FIT=y |
| 98 | ++CONFIG_FIT_VERBOSE=y |
| 99 | ++CONFIG_SPL_LOAD_FIT=y |
| 100 | ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb" |
| 101 | ++# CONFIG_DISPLAY_CPUINFO is not set |
| 102 | ++CONFIG_DISPLAY_BOARDINFO_LATE=y |
| 103 | ++CONFIG_MISC_INIT_R=y |
| 104 | ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set |
| 105 | ++CONFIG_TPL_SYS_MALLOC_SIMPLE=y |
| 106 | ++CONFIG_SPL_STACK_R=y |
| 107 | ++CONFIG_SPL_I2C_SUPPORT=y |
| 108 | ++CONFIG_SPL_POWER_SUPPORT=y |
| 109 | ++CONFIG_SPL_ATF=y |
| 110 | ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y |
| 111 | ++CONFIG_CMD_BOOTZ=y |
| 112 | ++CONFIG_CMD_GPT=y |
| 113 | ++CONFIG_CMD_MMC=y |
| 114 | ++CONFIG_CMD_USB=y |
| 115 | ++# CONFIG_CMD_SETEXPR is not set |
| 116 | ++CONFIG_CMD_TIME=y |
| 117 | ++CONFIG_SPL_OF_CONTROL=y |
| 118 | ++CONFIG_TPL_OF_CONTROL=y |
| 119 | ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" |
| 120 | ++CONFIG_TPL_OF_PLATDATA=y |
| 121 | ++CONFIG_ENV_IS_IN_MMC=y |
| 122 | ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 123 | ++CONFIG_NET_RANDOM_ETHADDR=y |
| 124 | ++CONFIG_TPL_DM=y |
| 125 | ++CONFIG_REGMAP=y |
| 126 | ++CONFIG_SPL_REGMAP=y |
| 127 | ++CONFIG_TPL_REGMAP=y |
| 128 | ++CONFIG_SYSCON=y |
| 129 | ++CONFIG_SPL_SYSCON=y |
| 130 | ++CONFIG_TPL_SYSCON=y |
| 131 | ++CONFIG_CLK=y |
| 132 | ++CONFIG_SPL_CLK=y |
| 133 | ++CONFIG_FASTBOOT_BUF_ADDR=0x800800 |
| 134 | ++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y |
| 135 | ++CONFIG_ROCKCHIP_GPIO=y |
| 136 | ++CONFIG_SYS_I2C_ROCKCHIP=y |
| 137 | ++CONFIG_MMC_DW=y |
| 138 | ++CONFIG_MMC_DW_ROCKCHIP=y |
| 139 | ++CONFIG_SF_DEFAULT_SPEED=20000000 |
| 140 | ++CONFIG_DM_ETH=y |
| 141 | ++CONFIG_ETH_DESIGNWARE=y |
| 142 | ++CONFIG_GMAC_ROCKCHIP=y |
| 143 | ++CONFIG_PINCTRL=y |
| 144 | ++CONFIG_SPL_PINCTRL=y |
| 145 | ++CONFIG_DM_PMIC=y |
| 146 | ++CONFIG_PMIC_RK8XX=y |
| 147 | ++CONFIG_SPL_DM_REGULATOR=y |
| 148 | ++CONFIG_REGULATOR_PWM=y |
| 149 | ++CONFIG_DM_REGULATOR_FIXED=y |
| 150 | ++CONFIG_SPL_DM_REGULATOR_FIXED=y |
| 151 | ++CONFIG_REGULATOR_RK8XX=y |
| 152 | ++CONFIG_PWM_ROCKCHIP=y |
| 153 | ++CONFIG_RAM=y |
| 154 | ++CONFIG_SPL_RAM=y |
| 155 | ++CONFIG_TPL_RAM=y |
| 156 | ++CONFIG_DM_RESET=y |
| 157 | ++CONFIG_BAUDRATE=1500000 |
| 158 | ++CONFIG_DEBUG_UART_SHIFT=2 |
| 159 | ++CONFIG_SYSINFO=y |
| 160 | ++CONFIG_SYSRESET=y |
| 161 | ++# CONFIG_TPL_SYSRESET is not set |
| 162 | ++CONFIG_USB=y |
| 163 | ++CONFIG_USB_XHCI_HCD=y |
| 164 | ++CONFIG_USB_XHCI_DWC3=y |
| 165 | ++CONFIG_USB_EHCI_HCD=y |
| 166 | ++CONFIG_USB_EHCI_GENERIC=y |
| 167 | ++CONFIG_USB_OHCI_HCD=y |
| 168 | ++CONFIG_USB_OHCI_GENERIC=y |
| 169 | ++CONFIG_USB_DWC2=y |
| 170 | ++CONFIG_USB_DWC3=y |
| 171 | ++# CONFIG_USB_DWC3_GADGET is not set |
| 172 | ++CONFIG_USB_GADGET=y |
| 173 | ++CONFIG_USB_GADGET_DWC2_OTG=y |
| 174 | ++CONFIG_SPL_TINY_MEMSET=y |
| 175 | ++CONFIG_TPL_TINY_MEMSET=y |
| 176 | ++CONFIG_ERRNO_STR=y |
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