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anaelorlinskianaelorlinski
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add R2C
1 parent 9b2a955 commit 0228a48

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‎.github/workflows/NanoPi-Build.yml‎

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@@ -49,7 +49,7 @@ jobs:
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needs: init
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strategy:
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matrix:
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nanopi_model: [R2S, R4S]
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nanopi_model: [R2S, R2C, R4S]
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runs-on: ubuntu-20.04
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if: github.event.repository.owner.id == github.event.sender.id

‎README.md‎

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@@ -38,6 +38,8 @@ Automated builds of OpenWrt for FriendlyARM NanoPi R2S & R4S boards
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## Changelog
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#### 2022-04-12
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- Add NanoPi R2C in uboot and branch 21.02
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#### 2022-03-28
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- Add branch 22.03
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#### 2022-02-12

‎openwrt-21.02/steps/03_patch_openwrt.sh‎

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@@ -45,6 +45,20 @@ endef
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TARGET_DEVICES += friendlyarm_nanopi-r4s
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EOT
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cat <<EOT >> target/linux/rockchip/image/armv8.mk
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define Device/friendlyarm_nanopi-r2c
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DEVICE_VENDOR := FriendlyARM
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DEVICE_MODEL := NanoPi R2C
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SOC := rk3328
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UBOOT_DEVICE_NAME := nanopi-r2c-rk3328
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IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r2s | pine64-img | gzip | append-metadata
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DEVICE_PACKAGES := kmod-usb-net-rtl8152
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endef
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TARGET_DEVICES += friendlyarm_nanopi-r2c
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EOT
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# r8152 driver from friendlywrt for kernel 5.4
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# add extra patch to update r8152 driver to v.1.11.11
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# note : driver 2.13 and 2.14 seem unstable from this thread

‎openwrt-21.02/steps/06-create_config_from_seed.sh‎

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@@ -20,4 +20,10 @@ if [[ "$1" == "R2S" ]]; then
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sed -i 's/cortex-a72.cortex-a53/cortex-a53/' .config
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fi
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if [[ "$1" == "R2C" ]]; then
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echo "NanoPi R2C model, post patching .config"
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sed -i 's/nanopi-r4s/nanopi-r2c/' .config
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sed -i 's/cortex-a72.cortex-a53/cortex-a53/' .config
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fi
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make defconfig

‎package/uboot-rockchip/Makefile‎

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@@ -24,6 +24,17 @@ endef
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# RK3328 boards
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define U-Boot/nanopi-r2c-rk3328
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BUILD_SUBTARGET:=armv8
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NAME:=NanoPi R2C
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BUILD_DEVICES:= \
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friendlyarm_nanopi-r2c
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DEPENDS:=+PACKAGE_u-boot-nanopi-r2c-rk3328:arm-trusted-firmware-rockchip
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PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip
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ATF:=rk3328_bl31.elf
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OF_PLATDATA:=$(1)
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endef
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define U-Boot/nanopi-r2s-rk3328
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BUILD_SUBTARGET:=armv8
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NAME:=NanoPi R2S
@@ -72,6 +83,7 @@ UBOOT_TARGETS := \
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nanopi-r4s-rk3399 \
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rock-pi-4-rk3399 \
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rockpro64-rk3399 \
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nanopi-r2c-rk3328 \
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nanopi-r2s-rk3328
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UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes

‎package/uboot-rockchip/patches/201-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch‎

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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index d3e89ca3ba..d5f64ac432 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -108,6 +108,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
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dtb-$(CONFIG_ROCKCHIP_RK3328) += \
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rk3328-evb.dtb \
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+ rk3328-nanopi-r2c.dtb \
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rk3328-nanopi-r2s.dtb \
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rk3328-orangepi-r1-plus.dtb \
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rk3328-roc-cc.dtb \
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diff --git a/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
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new file mode 100644
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index 0000000000..c2e86d0f0e
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-nanopi-r2c-u-boot.dtsi
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@@ -0,0 +1,7 @@
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+// SPDX-License-Identifier: GPL-2.0+
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+/*
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+ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd
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+ * (C) Copyright 2021 Tianling Shen
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+ */
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+
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+#include "rk3328-nanopi-r2s-u-boot.dtsi"
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diff --git a/arch/arm/dts/rk3328-nanopi-r2c.dts b/arch/arm/dts/rk3328-nanopi-r2c.dts
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new file mode 100644
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index 0000000000..adf91a0306
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-nanopi-r2c.dts
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@@ -0,0 +1,47 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyarm.com)
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+ *
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+ * Copyright (c) 2021 Tianling Shen <cnsztl@immortalwrt.org>
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+ */
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+
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+/dts-v1/;
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+
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+#include "rk3328-nanopi-r2s.dts"
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+
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+/ {
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+ model = "FriendlyElec NanoPi R2C";
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+ compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";
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+};
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+
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+&gmac2io {
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+ phy-handle = <&yt8521s>;
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+
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+ mdio {
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+ /delete-node/ ethernet-phy@1;
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+
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+ yt8521s: ethernet-phy@3 {
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+ compatible = "ethernet-phy-id0000.011a",
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+ "ethernet-phy-ieee802.3-c22";
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+ reg = <3>;
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+ pinctrl-0 = <&eth_phy_reset_pin>;
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+ pinctrl-names = "default";
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <50000>;
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+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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+
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+&lan_led {
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+ label = "nanopi-r2c:green:lan";
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+};
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+
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+&sys_led {
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+ label = "nanopi-r2c:red:sys";
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+};
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+
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+&wan_led {
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+ label = "nanopi-r2c:green:wan";
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+};
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diff --git a/configs/nanopi-r2c-rk3328_defconfig b/configs/nanopi-r2c-rk3328_defconfig
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new file mode 100644
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index 0000000000..7bc7a3274f
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--- /dev/null
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+++ b/configs/nanopi-r2c-rk3328_defconfig
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@@ -0,0 +1,98 @@
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+CONFIG_ARM=y
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SYS_TEXT_BASE=0x00200000
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+CONFIG_SPL_GPIO_SUPPORT=y
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+CONFIG_NR_DRAM_BANKS=1
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+CONFIG_ENV_OFFSET=0x3F8000
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+CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2c"
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+CONFIG_ROCKCHIP_RK3328=y
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+CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
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+CONFIG_TPL_LIBCOMMON_SUPPORT=y
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+CONFIG_TPL_LIBGENERIC_SUPPORT=y
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+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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+CONFIG_SPL_STACK_R_ADDR=0x600000
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+CONFIG_DEBUG_UART_BASE=0xFF130000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_DEBUG_UART=y
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+CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
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+# CONFIG_ANDROID_BOOT_IMAGE is not set
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+CONFIG_FIT=y
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+CONFIG_FIT_VERBOSE=y
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+CONFIG_SPL_LOAD_FIT=y
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-nanopi-r2c.dtb"
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+# CONFIG_DISPLAY_CPUINFO is not set
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+CONFIG_DISPLAY_BOARDINFO_LATE=y
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+CONFIG_MISC_INIT_R=y
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+CONFIG_TPL_SYS_MALLOC_SIMPLE=y
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+CONFIG_SPL_STACK_R=y
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+CONFIG_SPL_I2C_SUPPORT=y
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+CONFIG_SPL_POWER_SUPPORT=y
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+CONFIG_SPL_ATF=y
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+CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
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+CONFIG_CMD_BOOTZ=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_USB=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_TIME=y
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+CONFIG_SPL_OF_CONTROL=y
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+CONFIG_TPL_OF_CONTROL=y
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+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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+CONFIG_TPL_OF_PLATDATA=y
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+CONFIG_ENV_IS_IN_MMC=y
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+CONFIG_NET_RANDOM_ETHADDR=y
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+CONFIG_TPL_DM=y
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+CONFIG_REGMAP=y
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+CONFIG_SPL_REGMAP=y
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+CONFIG_TPL_REGMAP=y
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+CONFIG_SYSCON=y
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+CONFIG_SPL_SYSCON=y
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+CONFIG_TPL_SYSCON=y
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+CONFIG_CLK=y
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+CONFIG_SPL_CLK=y
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+CONFIG_FASTBOOT_BUF_ADDR=0x800800
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+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
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+CONFIG_ROCKCHIP_GPIO=y
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_MMC_DW=y
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+CONFIG_MMC_DW_ROCKCHIP=y
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+CONFIG_SF_DEFAULT_SPEED=20000000
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+CONFIG_DM_ETH=y
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+CONFIG_ETH_DESIGNWARE=y
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+CONFIG_GMAC_ROCKCHIP=y
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+CONFIG_PINCTRL=y
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+CONFIG_SPL_PINCTRL=y
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+CONFIG_DM_PMIC=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_SPL_DM_REGULATOR=y
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+CONFIG_REGULATOR_PWM=y
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+CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_SPL_DM_REGULATOR_FIXED=y
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+CONFIG_REGULATOR_RK8XX=y
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+CONFIG_PWM_ROCKCHIP=y
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+CONFIG_RAM=y
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+CONFIG_SPL_RAM=y
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+CONFIG_TPL_RAM=y
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+CONFIG_DM_RESET=y
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+CONFIG_BAUDRATE=1500000
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+CONFIG_DEBUG_UART_SHIFT=2
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+CONFIG_SYSINFO=y
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+CONFIG_SYSRESET=y
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+# CONFIG_TPL_SYSRESET is not set
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_DWC3=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_USB_EHCI_GENERIC=y
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+CONFIG_USB_OHCI_HCD=y
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+CONFIG_USB_OHCI_GENERIC=y
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+CONFIG_USB_DWC2=y
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+CONFIG_USB_DWC3=y
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+# CONFIG_USB_DWC3_GADGET is not set
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+CONFIG_USB_GADGET=y
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+CONFIG_USB_GADGET_DWC2_OTG=y
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+CONFIG_SPL_TINY_MEMSET=y
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+CONFIG_TPL_TINY_MEMSET=y
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+CONFIG_ERRNO_STR=y

‎package/uboot-rockchip/src/of-platdata/nanopi-r2c-rk3328/dt-decl.h‎

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/*
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* DO NOT MODIFY
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*
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* Declares externs for all device/uclass instances.
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* This was generated by dtoc from a .dtb (device tree binary) file.
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*/
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#include <dm/device-internal.h>
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#include <dm/uclass-internal.h>
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/* driver declarations - these allow DM_DRIVER_GET() to be used */
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extern U_BOOT_DRIVER(rockchip_rk3328_cru);
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extern U_BOOT_DRIVER(rockchip_rk3328_dmc);
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extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc);
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extern U_BOOT_DRIVER(ns16550_serial);
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extern U_BOOT_DRIVER(rockchip_rk3328_grf);
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/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */
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extern UCLASS_DRIVER(clk);
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extern UCLASS_DRIVER(mmc);
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extern UCLASS_DRIVER(ram);
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extern UCLASS_DRIVER(serial);
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extern UCLASS_DRIVER(syscon);

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