At present, the compiler generates code for the Hitachi 6309, which is an enhanced 6809 with extra registers and extra instructions. In particular, it uses the 6309's 32-bit Q register for 'long int' and similar 32-bit types. This means that it does not need to use X or Y as the high-order half of any 32-bit quantity that needs to be loaded, stored, or returned from a function.
But what if we want to support the original Motorola 6809 in the future? Maybe with a flag that gets passed to the code generator module? In that case, maybe we should disallow 'register' variables and use Y as the high half of 32-bit quantities. Then, most of the code generation would be the same for both chips. Just the allocation of the single 'register' variable would need to change.
At present, the compiler generates code for the Hitachi 6309, which is an enhanced 6809 with extra registers and extra instructions. In particular, it uses the 6309's 32-bit Q register for 'long int' and similar 32-bit types. This means that it does not need to use X or Y as the high-order half of any 32-bit quantity that needs to be loaded, stored, or returned from a function.
But what if we want to support the original Motorola 6809 in the future? Maybe with a flag that gets passed to the code generator module? In that case, maybe we should disallow 'register' variables and use Y as the high half of 32-bit quantities. Then, most of the code generation would be the same for both chips. Just the allocation of the single 'register' variable would need to change.