V8 microcode: AAM/AAD flags from AL, not full AX

AAM (0xD4) and AAD (0xD5) microcode populated alu_last_result with
the full AX register and called All_Flags_WORD, which uses the 16-bit
domain for SF (bit 15) and ZF (whole word). Per Intel docs, AAM/AAD
set SF, ZF, PF on AL only (CF, OF, AF are undefined).

For AAM, the post-instruction AX has AH=quotient, AL=remainder. When
AL=0 but AH!=0 (e.g. AL_pre=0x50, AAM 10 -> AX=0x0800), All_Flags_WORD
saw alu_last=0x0800 != 0 and left ZF=0. Real 8086 sets ZF=1 because
AL=0. Caught by Lotus 1-2-3 cosim at op=4901806 in CS:IP F000:19CB
area; worker pushed ZF=0 (CF=1, AF=1 — undefined and masked) while
host had ZF=1.

For AAD the body already zeroes AH, so AX AND 0xFF == AX and the
flag domain doesn't actually matter in practice — but fix it
consistently so the SF check is on bit 7 of AL, not bit 15 of AX,
and the microcode reads idiomatically.

Both ops now AND AX with 0x00FF into alu_last_result and call
CALCULATE_FLAGS_BYTE (the byte-domain path used by OR/AND/XOR).

Assembled output ships as Version_8.coe in both MCL86/Core and
MCL86jr/FPGA/src4synth (4-word diff vs Version_7 at ROM addresses
0x2BF / 0x2C0 / 0x2D7 / 0x2D8 — the AAM and AAD microcode entries).

Author: mx-shift