diff --git a/.github/workflows/validate.yml b/.github/workflows/validate.yml new file mode 100644 index 0000000..30e7b0e --- /dev/null +++ b/.github/workflows/validate.yml @@ -0,0 +1,134 @@ +name: validate + +on: + pull_request: + push: + branches: [main] + workflow_dispatch: + +permissions: + contents: read + +concurrency: + group: validate-${{ github.workflow }}-${{ github.ref }} + cancel-in-progress: true + +jobs: + cad: + name: CAD artifacts (build123d) + runs-on: ubuntu-24.04 + timeout-minutes: 30 + steps: + - uses: actions/checkout@v4 + + - uses: astral-sh/setup-uv@v6 + with: + enable-cache: true + + - name: Install code-CAD toolchain + run: scripts/cad-setup.sh + + - name: Rebuild and validate CAD artifacts + run: scripts/validate.sh --cad + + - name: Upload validation report + if: always() + uses: actions/upload-artifact@v4 + with: + name: cad-validation + path: build/cad-validation.json + if-no-files-found: ignore + + - name: Upload printable artifacts + if: always() + uses: actions/upload-artifact@v4 + with: + name: wedge-enclosure + path: | + cad/exports/wedge_enclosure.stl + cad/exports/wedge_enclosure.step + cad/exports/wedge_enclosure.png + if-no-files-found: ignore + + quality: + name: CAD quality (ruff, mypy, pytest) + runs-on: ubuntu-24.04 + timeout-minutes: 30 + steps: + - uses: actions/checkout@v4 + + - uses: astral-sh/setup-uv@v6 + with: + enable-cache: true + + - name: Install code-CAD toolchain + dev tools + run: scripts/cad-setup.sh --dev + + - name: Static analysis + run: scripts/cad-lint.sh + + - name: Geometry tests + run: scripts/cad-test.sh + + hardware: + name: Hardware ERC/DRC (KiCad 10) + runs-on: ubuntu-24.04 + timeout-minutes: 30 + steps: + - uses: actions/checkout@v4 + + - name: Install KiCad 10 + run: | + sudo add-apt-repository --yes ppa:kicad/kicad-10.0-releases + sudo apt-get update + sudo apt-get install -y --no-install-recommends kicad + kicad-cli --version + + - name: Seed the global footprint table + run: | + KICAD_VER="$(kicad-cli --version | cut -d. -f1,2)" + mkdir -p "$HOME/.config/kicad/$KICAD_VER" + if [ -f /usr/share/kicad/template/fp-lib-table ]; then + cp /usr/share/kicad/template/fp-lib-table "$HOME/.config/kicad/$KICAD_VER/" + fi + + - name: Validate schematic and board + run: scripts/validate.sh --hardware + + - name: Build the JLCPCB fabrication package (no order) + run: scripts/fab_export.sh + + - name: Upload fabrication package + if: always() + uses: actions/upload-artifact@v4 + with: + name: jlcpcb-package + path: | + build/fab/TEG-gerbers.zip + build/fab/TEG-BOM-jlcpcb.csv + build/fab/TEG-CPL-jlcpcb.csv + if-no-files-found: ignore + + - name: Upload ERC/DRC reports + if: always() + uses: actions/upload-artifact@v4 + with: + name: kicad-reports + path: build/*.rpt + if-no-files-found: ignore + + scripts: + name: Scripts (syntax) + runs-on: ubuntu-24.04 + timeout-minutes: 10 + steps: + - uses: actions/checkout@v4 + + - uses: actions/setup-python@v5 + with: + python-version: "3.13" + + - name: Syntax-check shell and Python + run: | + for f in scripts/*.sh; do bash -n "$f"; done + python3 -m compileall -q cad scripts tests diff --git a/.gitignore b/.gitignore index a743ea2..1ff4921 100644 --- a/.gitignore +++ b/.gitignore @@ -14,5 +14,8 @@ _autosave-* __pycache__/ *.pyc +# CAD toolchain virtualenvs (scripts/cad-setup*.sh recreate them) +.venv/ + # Generated validation artifacts (regenerate with scripts/validate.sh) build/ diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml new file mode 100644 index 0000000..17759a6 --- /dev/null +++ b/.pre-commit-config.yaml @@ -0,0 +1,22 @@ +# Local quality gates for the code-CAD sources. The hooks use the repo-local +# .venv (create it once with `scripts/cad-setup.sh --dev`) so ruff/mypy versions +# are pinned by cad/requirements-dev.txt rather than re-downloaded by pre-commit. +# +# uv pip install --python .venv/bin/python pre-commit +# .venv/bin/pre-commit install +repos: + - repo: local + hooks: + - id: cad-lint + name: CAD lint (ruff + mypy) + entry: scripts/cad-lint.sh + language: system + pass_filenames: false + files: ^(cad/.*\.py|tests/.*\.py|pyproject\.toml)$ + - id: cad-test + name: CAD geometry tests (pytest) + entry: scripts/cad-test.sh + language: system + pass_filenames: false + files: ^(cad/wedge\.py|cad/parameters\.py|tests/.*\.py)$ + stages: [pre-push] diff --git a/.vscode/extensions.json b/.vscode/extensions.json index 65420df..2209578 100644 --- a/.vscode/extensions.json +++ b/.vscode/extensions.json @@ -1,5 +1,9 @@ { "recommendations": [ - "jessejabezarendse.kicanvas-viewer" + "jessejabezarendse.kicanvas-viewer", + "bernhard-42.ocp-cad-viewer", + "ms-python.python", + "charliermarsh.ruff", + "ms-python.mypy-type-checker" ] -} \ No newline at end of file +} diff --git a/BOM.md b/BOM.md index 3d42fb6..5a64823 100644 --- a/BOM.md +++ b/BOM.md @@ -117,4 +117,6 @@ Conservative and datasheet-verified. Usable energy 3.15→2.2 V is limited (≈2 - [x] MT3608 feedback divider computed → 73.2 k / 10 k = 5.0 V - [x] Storage decided (option D) and added to the netlist/board - [ ] **Route copper + GND pour** ← the remaining work -- [ ] Export Gerbers/drill + JLCPCB `BOM.csv` / `CPL.csv` +- [x] Export Gerbers/drill + JLCPCB `BOM.csv` / `CPL.csv` — scripted as + [scripts/fab_export.sh](scripts/fab_export.sh); see + [docs/jlcpcb-fabrication.md](docs/jlcpcb-fabrication.md) diff --git a/PLAN.md b/PLAN.md index 18156f6..f8bc19d 100644 --- a/PLAN.md +++ b/PLAN.md @@ -179,8 +179,11 @@ Draft currently uses a **single root sheet** with block annotations; to be split 5. **Route the board** — GND pour first, then power, then signals; re-check DRC. 6. **Source the remaining parts** — supercap (hand-solder), 22 µH inductor, the six odd E96 resistors, R8/R9, R10. See the parts table in [README.md](README.md). -7. **Export Gerbers/drill + JLCPCB `BOM.csv` / `CPL.csv`**; add a fabrication checklist - (stackup, assembly side, part rotations). No script yet. +7. ~~**Export Gerbers/drill + JLCPCB `BOM.csv` / `CPL.csv`**~~ **Scripted** — + `scripts/fab_export.sh` produces the whole JLCPCB package (Gerbers + drill + BOM + + CPL) in one command; `scripts/jlc_bom.py` / `scripts/jlc_cpl.py` do the conversions. + Fabrication checklist and the manual, approval-gated ordering path are documented in + [docs/jlcpcb-fabrication.md](docs/jlcpcb-fabrication.md). 8. **Bench-verify** the board from a bench supply emulating the TEG before running the thermal tests. 9. **Thermal tests** — one-module baseline, two-module comparison, five cold starts, 0.5 W load. 10. Optional follow-ups: make the MPP ratio selectable (R13/R14) for measurement; recompute @@ -190,6 +193,9 @@ Draft currently uses a **single root sheet** with block annotations; to be split | Date | Change | |------|--------| +| 2026-10-20 | **CAD toolchain finalized on build123d.** The bake-off (CadQuery, SolidCraft, FreeCAD) was a comparison exercise; its sources, exports and runner scripts are removed so the PR contains only the toolchain we will maintain: `cad/wedge.py` + `cad/parameters.py`, the committed STEP/STL, the VS Code viewer workflow, and the ruff/mypy/pytest + artifact-validation gates. `scripts/validate_cad.py` now validates only the canonical build123d artifacts. | +| 2026-10-20 | **Validation pipeline added for the engineering artifacts.** `scripts/validate_cad.py` checks the committed STEP/STL (closed single-body mesh, bed fit, STEP↔STL agreement) and rebuilds the canonical wedge to catch stale exports; `scripts/validate.sh` now runs both CAD and KiCad ERC/DRC; `.github/workflows/validate.yml` runs the CAD, hardware (ERC/DRC + JLCPCB package build) and script-syntax jobs on every PR. Details in [docs/validation.md](docs/validation.md) | +| 2026-10-14 | **JLCPCB fabrication flow scripted end-to-end.** Added `scripts/fab_export.sh` (one command → Gerbers + Excellon drill + BOM + CPL + upload zip in `build/fab/`), `scripts/jlc_bom.py` (schematic → JLCPCB `Comment,Designator,Footprint,LCSC Part #`) and `scripts/jlc_cpl.py` (KiCad `pos` CSV → JLCPCB CPL). Default is SMT-only assembly, with the BOM restricted to the CPL designators so the two files always agree (JLCPCB rejects a BOM part missing from the CPL); `--tht` includes through-hole parts. Verified the BOM generator against the reference board (23 lines / 33 designators). Ordering stays **manual and approval-gated** — JLCPCB's official Open Platform API (`api.jlcpcb.com`) is application-gated and not wired; documented in [docs/jlcpcb-fabrication.md](docs/jlcpcb-fabrication.md) | | 2026-10-10 | **TEG module datasheet obtained and extracted** (Coherent TG12-4, 3 pages) — closes the "datasheet verification pending" item open since day one. Verified: **200 °C continuous** rating (230 °C intermittent), AC resistance 2.76–3.41 Ω, **clamp at 1.4 MPa (200 psi)**, thermal resistance ~2.2 °C/W, and power/voltage/current tables at cold side 50 °C. **The earlier estimate was ~3× pessimistic**: at hot 170 °C a module makes **2.12 W** (not ~0.7 W), so **2 modules ≈ 3.2 W and 3 modules ≈ 4.8 W** at a 150 °C hot side — E1 is met with 2–3 modules. Also established: V_mp/V_oc ≈ 0.57 (fractional-V_oc MPPT confirmed), the **cold side is the binding constraint** (~150 W to reject for ~4.8 W electrical, so expect 3–4 W with a practical fan-cooled heatsink), and at low ΔT the array voltage falls below a 5 V buck's input so a buck-boost may be needed for cold start. Sourced via alldatasheet → Bing → Coherent's own PDF (the direct search engines were blocked from this environment; the PDF came from coherent.com) | | 2026-10-10 | **Project re-scoped by [REQUIREMENTS.md](REQUIREMENTS.md)**: fireplace-mounted wedge harvester, **~3–4 W**, 1 × USB-A + 1 × USB-C sharing the output, **fan-cooled** (no water), total BOM ≤ $200. The BQ25504 board (≤300 mW) becomes a validated sub-watt **reference**, not the deliverable. Corrected an earlier error: the first 5–10 W analysis assumed passive cooling at ΔT ≈ 50 °C; with fan-forced cooling at ΔT ≈ 70 °C per-module output roughly doubles, so a few watts needs 2–3 modules, not 10–20. Key new parts identified and verified in the JLCPCB catalogue: buck front end **TPS54331DR (C9865)**, USB-C receptacle **TYPE-C-31-M-12 (C165948)**, SMD USB-A **AF 10.0 QT-ZB6.8 (C456016)**; fan driver reuses AO3400A (C20917) | |------|--------| diff --git a/README.md b/README.md index 0d65fb4..5fe42fa 100644 --- a/README.md +++ b/README.md @@ -69,14 +69,17 @@ The classes still exist so wider widths can be set later, after a manual fanout ## Fabrication outputs -Generated into `build/fab/` (gitignored — regenerate with the commands in -[Opening the project](#opening-the-project)): +Generated into `build/fab/` (gitignored) by **[scripts/fab_export.sh](scripts/fab_export.sh)** +— one command for the whole JLCPCB package (Gerbers + drill + BOM + CPL). Full flow and +the ordering/approval path: **[docs/jlcpcb-fabrication.md](docs/jlcpcb-fabrication.md)**. | File | What | |------|------| +| `TEG-gerbers.zip` | JLCPCB PCB upload — Gerbers + drill + `.gbrjob` | | `TEG-*.gbl/.gtl/.gbs/.gts/.gbo/.gto/.gm1` + `TEG-job.gbrjob` | Gerbers (2 copper, 2 mask, 2 silk, edge) | | `TEG.drl` | Excellon drill | -| `TEG-pos.csv` | Pick-and-place (`kicad-cli pcb export pos`) | +| `TEG-pos.csv` | Raw pick-and-place (`kicad-cli pcb export pos`) | +| `TEG-CPL-jlcpcb.csv` | JLCPCB **CPL** — `Designator,Val,Package,Mid X,Mid Y,Rotation,Layer` | | `TEG-BOM-jlcpcb.csv` | JLCPCB BOM — `Comment,Designator,Footprint,LCSC Part #` | | `TEG-routed.pdf`, `TEG-schematic.pdf` | 2D renders for review (copper visible here) | | `build/render/TEG-*.png` | **3D renders** (top / isometric / bottom / harvester close-up) — see [scripts/render.sh](scripts/render.sh) | @@ -154,6 +157,21 @@ There is **no MCU on the board**, so `FAN_PWM` (J2 pin 4) must be driven by an e a bench supply, signal generator, or your instrumentation. `FAN_TACH` (pin 3) has a 10 kΩ pull-up to `+5V` (R11) so you can read fan speed. Feed the fan from `+5V` (pin 2) and `GND` (pin 1). +## Continuous validation + +Every pull request runs these checks (see **[docs/validation.md](docs/validation.md)**): + +| Check | What it proves | +|-------|----------------| +| **CAD artifacts** | Rebuilds the build123d wedge and requires the committed STEP/STL to match. Every STL is a closed, single-body, bed-fitting mesh. | +| **ERC / DRC** | `kicad-cli` (KiCad 10) finds no error-level schematic or board violations. | +| **Fab package** | Gerbers, drill, CPL, BOM and the JLCPCB zip build; nothing is ordered. | +| **Scripts** | All shell scripts parse and all Python sources compile. | + +Run the same checks locally with `scripts/validate.sh` (add `--cad` if KiCad is +not installed). A failing CAD check usually means the committed exports are +stale: run `scripts/cad-run.sh` and commit the updated artifacts. + ## What to expect when you test **Two TG12-4 modules produce only a few hundred mW at useful ΔT, while the fan draws @@ -168,6 +186,9 @@ the expected behaviour of this build, not a fault. | [REQUIREMENTS.md](REQUIREMENTS.md) | **Whole-device requirements** — electrical, mechanical, thermal/safety, manufacturing, and the system BOM split into *from JLCPCB* vs *buy separately* | | [BOM.md](BOM.md) | Board bill of materials (the sub-watt reference design) | | [PLAN.md](PLAN.md) | Living plan: findings, decisions, open questions, changelog | +| [docs/validation.md](docs/validation.md) | **CI + local validation flow** — what every push checks, how to fix a failing artifact | +| [.github/workflows/validate.yml](.github/workflows/validate.yml) | CI: rebuild/validate CAD, lint/test the model code, run KiCad ERC/DRC, syntax-check scripts | +| [docs/jlcpcb-fabrication.md](docs/jlcpcb-fabrication.md) | **End-to-end JLCPCB flow** — fab package command, verification checklist, manual approval-gated ordering | | `hardware/TEG.kicad_pro` | KiCad project | | `hardware/TEG.kicad_sch` | Root schematic (auto-generated — nets defined by pin labels) | | `hardware/TEG.kicad_pcb` | Board (auto-generated — 33 footprints placed and netted, **no copper routed yet**) | @@ -176,8 +197,12 @@ the expected behaviour of this build, not a fault. | `hardware/easyeda2kicad.3dshapes/` | 3D WRL models, named as the footprints reference them | | `scripts/gen_schematic.py` | Regenerates `TEG.kicad_sch` from the part/net table inside it | | `scripts/gen_board.py` | Regenerates `TEG.kicad_pcb` (shares the netlist with `gen_schematic.py`) | -| `scripts/validate.sh` | Runs KiCad ERC (schematic) and DRC (board); needs `kicad-cli` | +| `scripts/validate.sh` | **All checks**: rebuild/validate the code-CAD exports, then KiCad ERC + DRC (`--cad` / `--hardware` for one half) | +| `scripts/validate_cad.py` | Validates committed CAD STEP/STL artifacts: manifold mesh, bed fit, STEP↔STL agreement, stale-export check | | `scripts/jlc_lookup.py` | Queries JLCPCB's own parts API — id, library type, stock | +| `scripts/fab_export.sh` | **One command** → JLCPCB package (Gerbers + drill + BOM + CPL) in `build/fab/` | +| `scripts/jlc_bom.py` | Schematic → JLCPCB BOM CSV (`Comment,Designator,Footprint,LCSC Part #`) | +| `scripts/jlc_cpl.py` | KiCad `pos` CSV → JLCPCB CPL CSV | | `scripts/freeroute.sh` | Routes the board via the SPECCTRA DSN→FreeRouting→SES round-trip, then DRCs | | `scripts/render.sh` | Renders 3D views of the board (with component bodies) into `build/render/` | | `scripts/route_board.py` | *Abandoned* hand-written router (kept for reference; not used) | @@ -194,14 +219,12 @@ The schematic and board are **generated** — edit the part/net table in python3 scripts/gen_schematic.py # -> hardware/TEG.kicad_sch python3 scripts/gen_board.py # -> hardware/TEG.kicad_pcb (unrouted, wipes routing) ./scripts/freeroute.sh # route it (DSN -> FreeRouting -> SES -> DRC) -./scripts/validate.sh # ERC + DRC (needs kicad-cli) +./scripts/validate.sh # all checks (CAD artifacts + ERC/DRC) +./scripts/validate.sh --cad # CAD artifacts only, no KiCad needed python3 scripts/jlc_lookup.py "22uH inductor" # search the JLCPCB catalogue -# fabrication outputs -KC=~/Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli -$KC pcb export gerbers -o build/fab/ hardware/TEG.kicad_pcb -$KC pcb export drill --excellon-units mm -o build/fab/ hardware/TEG.kicad_pcb -$KC pcb export pos --format csv --units mm -o build/fab/TEG-pos.csv hardware/TEG.kicad_pcb +# one-command JLCPCB package: gerbers + drill + BOM + CPL into build/fab/ +scripts/fab_export.sh # see docs/jlcpcb-fabrication.md (ordering is manual + approval-gated) ``` **Known cosmetic warnings** (safe to ignore): ERC reports 3 × `lib_symbol_mismatch` on the two diff --git a/cad/README.md b/cad/README.md new file mode 100644 index 0000000..4e48726 --- /dev/null +++ b/cad/README.md @@ -0,0 +1,25 @@ +# cad/ — code-CAD for the printed parts + +The wedge enclosure and other printed mechanical parts are authored **in code** +with [build123d](https://build123d.readthedocs.io/), not in a GUI. Source is a +program, so a change is a reviewable diff and an agent can drive it end to end. + +- `parameters.py` — every dimension (the single source of truth). +- `wedge.py` — the wedge model; exports `exports/wedge_enclosure.{step,stl,png}`. +- `exports/` — committed build output. The **STL feeds the Bambu print task**. +- `requirements.txt` — pinned model toolchain; `requirements-dev.txt` adds + ruff, mypy and pytest for the quality gate. + +```bash +scripts/cad-setup.sh --dev # once: create .venv/ and install deps (no sudo) +scripts/cad-run.sh # build + export +scripts/cad-lint.sh # ruff + mypy +scripts/cad-test.sh # geometry tests +``` + +For live review, open the model in VS Code with the **OCP CAD Viewer** extension +(pinned in `.vscode/extensions.json`); see +[docs/cad-toolchain.md §10](../docs/cad-toolchain.md#10-editing-and-review-in-a-gui). + +Full contract, conventions, and the requirements mapping: +**[docs/cad-toolchain.md](../docs/cad-toolchain.md)**. diff --git a/cad/exports/wedge_enclosure.png b/cad/exports/wedge_enclosure.png new file mode 100644 index 0000000..1d80fcc Binary files /dev/null and b/cad/exports/wedge_enclosure.png differ diff --git a/cad/exports/wedge_enclosure.step b/cad/exports/wedge_enclosure.step new file mode 100644 index 0000000..4dbed2f --- /dev/null +++ b/cad/exports/wedge_enclosure.step @@ -0,0 +1,3659 @@ +ISO-10303-21; +HEADER; +FILE_DESCRIPTION(('Open CASCADE Model'),'2;1'); +FILE_NAME('Open CASCADE Shape Model','2026-10-14T18:43:47',('Author'),( + 'Open CASCADE'),'Open CASCADE STEP processor 8.0','build123d', + 'Unknown'); +FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }')); +ENDSEC; +DATA; +#1 = APPLICATION_PROTOCOL_DEFINITION('international standard', + 'automotive_design',2000,#2); +#2 = APPLICATION_CONTEXT( + 'core data for automotive mechanical design processes'); +#3 = SHAPE_DEFINITION_REPRESENTATION(#4,#10); +#4 = PRODUCT_DEFINITION_SHAPE('','',#5); +#5 = PRODUCT_DEFINITION('design','',#6,#9); +#6 = PRODUCT_DEFINITION_FORMATION('','',#7); +#7 = PRODUCT('COMPOUND','COMPOUND','',(#8)); +#8 = PRODUCT_CONTEXT('',#2,'mechanical'); +#9 = PRODUCT_DEFINITION_CONTEXT('part definition',#2,'design'); +#10 = ADVANCED_BREP_SHAPE_REPRESENTATION('',(#11,#15),#3125); +#11 = AXIS2_PLACEMENT_3D('',#12,#13,#14); +#12 = CARTESIAN_POINT('',(0.,0.,0.)); +#13 = DIRECTION('',(0.,0.,1.)); +#14 = DIRECTION('',(1.,0.,-0.)); +#15 = MANIFOLD_SOLID_BREP('',#16); +#16 = CLOSED_SHELL('',(#17,#499,#575,#740,#903,#930,#980,#1035,#1085, + #1140,#1190,#1266,#1315,#1364,#1391,#1446,#1501,#1551,#1733,#1815, + #1892,#2107,#2152,#2333,#2358,#2362,#2366,#2373,#2377,#2381,#2408, + #2435,#2462,#2489,#2516,#2529,#2584,#2639,#2694,#2749,#2784,#2819, + #2854,#2889,#2944,#2999,#3054,#3109,#3113,#3117,#3121)); +#17 = ADVANCED_FACE('',(#18,#137,#168,#199,#230,#261,#292,#406,#437,#468 + ),#32,.T.); +#18 = FACE_BOUND('',#19,.T.); +#19 = EDGE_LOOP('',(#20,#55,#83,#111)); +#20 = ORIENTED_EDGE('',*,*,#21,.T.); +#21 = EDGE_CURVE('',#22,#24,#26,.T.); +#22 = VERTEX_POINT('',#23); +#23 = CARTESIAN_POINT('',(-75.,0.,150.)); +#24 = VERTEX_POINT('',#25); +#25 = CARTESIAN_POINT('',(-75.,0.,0.)); +#26 = SURFACE_CURVE('',#27,(#31,#43),.PCURVE_S1.); +#27 = LINE('',#28,#29); +#28 = CARTESIAN_POINT('',(-75.,0.,150.)); +#29 = VECTOR('',#30,1.); +#30 = DIRECTION('',(0.,0.,-1.)); +#31 = PCURVE('',#32,#37); +#32 = PLANE('',#33); +#33 = AXIS2_PLACEMENT_3D('',#34,#35,#36); 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+#3128 = ( NAMED_UNIT(*) SI_UNIT($,.STERADIAN.) SOLID_ANGLE_UNIT() ); +#3129 = UNCERTAINTY_MEASURE_WITH_UNIT(LENGTH_MEASURE(1.E-05),#3126, + 'distance_accuracy_value','confusion accuracy'); +#3130 = PRODUCT_RELATED_PRODUCT_CATEGORY('part',$,(#7)); +ENDSEC; +END-ISO-10303-21; diff --git a/cad/exports/wedge_enclosure.stl b/cad/exports/wedge_enclosure.stl new file mode 100644 index 0000000..6c34c18 Binary files /dev/null and b/cad/exports/wedge_enclosure.stl differ diff --git a/cad/parameters.py b/cad/parameters.py new file mode 100644 index 0000000..12b86b5 --- /dev/null +++ b/cad/parameters.py @@ -0,0 +1,133 @@ +"""Source-of-truth parameters for the printed TEG wedge enclosure. + +This module is the single place to edit dimensions. ``wedge.py`` reads a +``WedgeParams`` instance (defaults here, or overridden from a JSON file / CLI) +and turns it into a solid, so a change to a number here is the whole diff. + +Values are millimetres, newtons, megapascals and degrees. Every default that +comes from a datasheet or a requirement cites it inline; estimates are marked +``(estimate)`` exactly as in REQUIREMENTS.md. +""" + +from __future__ import annotations + +import json +from dataclasses import asdict, dataclass +from pathlib import Path + + +@dataclass(frozen=True) +class WedgeParams: + """Geometry + design inputs for the wedge enclosure. + + Coordinate system (see ``wedge.py``): + * X = width (left/right) + * Y = depth (0 at the hot face, ``depth`` at the cold-side back face) + * Z = height (0 at the bed/base, ``front_height`` at the top of the hot face) + """ + + # --- printer / envelope ------------------------------------------------- + # P1: Bambu Lab A1 mini build volume. + bed_x: float = 180.0 + bed_y: float = 180.0 + bed_z: float = 180.0 + + # --- wedge envelope ----------------------------------------------------- + width: float = 150.0 # across the hot face + front_height: float = 150.0 # hot-face height (against the fireplace) + back_height: float = 100.0 # cold-side height after the taper + depth: float = 55.0 # hot face -> back face + wall: float = 5.0 # printed wall thickness (holds 3 mm magnet pockets + # with a floor, + a rebate for the metal plate) + fillet: float = 6.0 # outer vertical edge rounding (estimate) + base_thickness: float = 3.0 # floor of the open bottom + + # --- hot-side metal interface plate (NOT printed; T1/T5) ---------------- + # The metal plate spreads the fireplace heat and clamps the TEG stack. The + # printed pocket is a rebate so the plastic never sits in the hot path (T2); + # ``thermal_break_gap`` is the air gap between plate and printed pocket. + plate_w: float = 96.0 + plate_h: float = 96.0 + plate_pocket_depth: float = 2.0 + thermal_break_gap: float = 0.8 + + # --- TEG stack (Coherent TG12-4-01LS datasheet) ------------------------- + teg_len: float = 34.01 # Base ceramic length + teg_wid: float = 30.0 # Base ceramic width + teg_thk: float = 3.33 # Height + teg_count: int = 2 # 2 modules meet E1 (~3.2 W) + teg_stack_gap: float = 0.5 # locating clearance around the modules + clamp_pressure_mpa: float = 1.4 # REQUIREMENTS.md section 8 (200 psi) + + # --- clamping hardware (REQUIREMENTS.md section 8) ---------------------- + clamp_screw_dia: float = 4.3 # M4 clearance + clamp_boss_dia: float = 12.0 + clamp_boss_len: float = 12.0 # into the cavity from the inner front wall + clamp_screw_count: int = 4 + + # --- magnets + mechanical retention (T4/S2) ----------------------------- + magnet_dia: float = 10.0 # SmCo disc (estimate; grade TBD, see T4) + magnet_thk: float = 3.0 + magnet_clearance: float = 0.15 # per side, for glue/adhesive + magnet_inset: float = 14.0 # edge distance to magnet centre + retention_screw_dia: float = 3.4 # M3 clearance, S2 mechanical backup + retention_inset: float = 14.0 + + # --- fan + heatsink on the cold side (P5) ------------------------------- + fan_size: float = 80.0 # Noctua NF-A8 (80 mm) + fan_hole_dia: float = 76.0 # through opening + fan_mount_pitch: float = 71.5 # NF-A8 mounting-hole pitch + fan_mount_dia: float = 4.4 # M4 fan screw clearance + + # --- derived / cosmetic ------------------------------------------------ + export_stem: str = "wedge_enclosure" + + # ------------------------------------------------------------------ utils + def teg_array_size(self) -> tuple[float, float]: + """Bounding footprint (width, height) of the vertical TEG stack.""" + if self.teg_count <= 1: + return (self.teg_len, self.teg_wid) + return (self.teg_len, self.teg_count * self.teg_wid) + + def clamp_force_n(self) -> float: + """Total normal force the clamp must apply (F = P * A * count).""" + area_mm2 = self.teg_len * self.teg_wid * self.teg_count + return self.clamp_pressure_mpa * area_mm2 + + def clamp_force_per_screw_n(self) -> float: + return self.clamp_force_n() / self.clamp_screw_count + + def bounding_box(self) -> tuple[float, float, float]: + """Overall envelope (X, Y, Z) of the finished part.""" + return (self.width, self.depth, self.front_height) + + def fits_bed(self) -> tuple[bool, str]: + bx, by, bz = self.bounding_box() + ok = bx <= self.bed_x and by <= self.bed_y and bz <= self.bed_z + msg = (f"{bx:g} x {by:g} x {bz:g} mm vs bed " + f"{self.bed_x:g} x {self.bed_y:g} x {self.bed_z:g} mm") + return ok, msg + + def validate(self) -> None: + if self.front_height <= self.back_height: + raise ValueError("front_height must exceed back_height for a wedge") + if self.wall <= 0 or self.depth <= 2 * self.wall: + raise ValueError("depth must be greater than two walls") + if self.plate_w > self.width or self.plate_h > self.front_height: + raise ValueError("interface plate larger than the hot face") + + # ---------------------------------------------------------------- io + def to_json(self) -> str: + return json.dumps(asdict(self), indent=2, sort_keys=True) + + @classmethod + def from_json_file(cls, path: str | Path) -> WedgeParams: + data = json.loads(Path(path).read_text()) + allowed = {f for f in cls.__dataclass_fields__} + unknown = set(data) - allowed + if unknown: + raise ValueError(f"unknown parameter(s): {sorted(unknown)}") + return cls(**data) + + +DEFAULTS = WedgeParams() diff --git a/cad/requirements-dev.txt b/cad/requirements-dev.txt new file mode 100644 index 0000000..b61541f --- /dev/null +++ b/cad/requirements-dev.txt @@ -0,0 +1,7 @@ +# Development-only tooling for the code-CAD sources (see pyproject.toml). +# Install into the repo-local .venv with scripts/cad-setup.sh --dev +# or directly: +# uv pip install --python .venv/bin/python -r cad/requirements-dev.txt +ruff==0.17.1 +mypy==2.4.0 +pytest==9.1.1 diff --git a/cad/requirements.txt b/cad/requirements.txt new file mode 100644 index 0000000..76499b1 --- /dev/null +++ b/cad/requirements.txt @@ -0,0 +1,6 @@ +# CAD toolchain for the TEG wedge enclosure and printed parts. +# Install into the repo-local virtualenv with scripts/cad-setup.sh: +# scripts/cad-setup.sh +# Pinned so a build is reproducible; bump deliberately. +build123d==0.13.0 +matplotlib==3.11.2 diff --git a/cad/wedge.py b/cad/wedge.py new file mode 100644 index 0000000..fea9e2e --- /dev/null +++ b/cad/wedge.py @@ -0,0 +1,272 @@ +#!/usr/bin/env python3 +"""Author the TEG wedge enclosure as editable code and export STEP + STL. + +The wedge carries the TEG array, the hot-side metal interface plate, the +cold-side heatsink/fan and the power board, and holds itself to a metal +fireplace face with SmCo magnets plus mechanical retention. Design intent and +the requirements it must satisfy (REQUIREMENTS.md): + + * P1 the whole printed part fits the Bambu A1 mini 180 mm cube; + * P2 a flat vertical *hot* face tapers back to the heatsink; + * T2 printed plastic stays off the hot path - the metal interface plate sits + in a rebate and never loads the plastic; + * T5 a thermal-break air gap separates plate and printed pocket; + * T4 magnet pockets are sized for high-temperature SmCo discs; + * S2 M3 retention screws are a mechanical backup to the magnets; + * section 8 the clamp carries the ~1.4 MPa TEG-stack preload. + +Run with the repo toolchain (see docs/cad-toolchain.md): + + scripts/cad-run.sh # export default part + scripts/cad-run.sh --params cad/params.json + scripts/cad-run.sh --out cad/exports --no-render + +Outputs (default ``cad/exports/``): ``.step`` (design interchange) and +``.stl`` (printable mesh). The STL is what the Bambu print task consumes. +""" + +from __future__ import annotations + +import argparse +import sys +from pathlib import Path +from typing import Any + +from build123d import ( + Axis, + Box, + BuildLine, + BuildPart, + BuildSketch, + Cylinder, + Plane, + Polyline, + Pos, + Rot, + export_step, + export_stl, + extrude, + make_face, + offset, +) + +HERE = Path(__file__).resolve().parent +sys.path.insert(0, str(HERE)) +from parameters import DEFAULTS, WedgeParams # noqa: E402 + + +# --------------------------------------------------------------------------- # +# geometry +# --------------------------------------------------------------------------- # +def build_wedge(p: WedgeParams): + """Return a build123d Part for the wedge enclosure.""" + p.validate() + + with BuildPart() as bp: + # Side profile in the Y-Z plane, extruded across the full width. The + # profile is a trapezoid: full height at the hot face (Y=0) tapering to + # ``back_height`` at the back face (Y=depth) - the defining wedge (P2). + with BuildSketch(Plane.YZ): + with BuildLine(): + Polyline( + (0, 0), + (p.depth, 0), + (p.depth, p.back_height), + (0, p.front_height), + (0, 0), + ) + make_face() + extrude(amount=p.width / 2, both=True) + + # Hollow it out, open at the bottom (Z=0) so the electronics/TEG stack + # slide in and the back face stays intact for the fan/heatsink. A + # negative offset keeps the outer envelope and adds an inward wall. + bottom = bp.faces().sort_by(Axis.Z)[0] + offset(openings=bottom, amount=-p.wall) + + part = bp.part + + # -- hot face (Y=0): metal interface-plate rebate + thermal break (T1/T2/T5) + plate_pocket = Pos(0, p.plate_pocket_depth / 2, p.front_height / 2) * Box( + p.plate_w, p.plate_pocket_depth, p.plate_h + ) + part -= plate_pocket + + # -- magnets (T4): four SmCo pockets on the hot-face rim ------------------ + mag_r = (p.magnet_dia + 2 * p.magnet_clearance) / 2 + mag_h = p.magnet_thk + p.magnet_clearance + mx = p.width / 2 - p.magnet_inset + magnet_centres = [ + (0, 0, p.front_height - p.magnet_inset), # top edge + (0, 0, p.magnet_inset), # bottom edge + (-mx, 0, p.front_height / 2), # left edge + (mx, 0, p.front_height / 2), # right edge + ] + for cx, _cy, cz in magnet_centres: + part -= Pos(cx, mag_h / 2, cz) * Rot(X=90) * Cylinder(mag_r, mag_h) + + # -- mechanical retention screws (S2): M3 through-holes at the corners ---- + rx = p.width / 2 - p.retention_inset + rz = p.front_height / 2 - p.retention_inset + for sx in (-rx, rx): + for sz in (p.front_height / 2 - rz, p.front_height / 2 + rz): + part -= Pos(sx, 10, sz) * Rot(X=90) * Cylinder( + p.retention_screw_dia / 2, 30 + ) + + # -- cold side (Y=depth): fan opening + mounting holes (P5) --------------- + back_face_y = p.depth + part -= Pos(0, back_face_y, p.back_height / 2) * Rot(X=90) * Cylinder( + p.fan_hole_dia / 2, 3 * p.wall + ) + fan_q = p.fan_mount_pitch / 2 + for fx in (-fan_q, fan_q): + for fz in (p.back_height / 2 - fan_q, p.back_height / 2 + fan_q): + part -= Pos(fx, back_face_y, fz) * Rot(X=90) * Cylinder( + p.fan_mount_dia / 2, 3 * p.wall + ) + + # -- clamp (section 8): bosses + M4 clearance holes carry the 1.4 MPa load - + # The holes are tapped into the bosses from the *cavity* side (heat-set + # inserts); they deliberately do not break through the hot face. + aw, ah = p.teg_array_size() + boss_x = aw / 2 + p.clamp_boss_dia / 2 + boss_z = ah / 2 + p.clamp_boss_dia / 2 + hole_depth = max(4.0, p.clamp_boss_len - 2.0) + for bx in (-boss_x, boss_x): + for bz in (p.front_height / 2 - boss_z, p.front_height / 2 + boss_z): + part += Pos(bx, p.wall + p.clamp_boss_len / 2, bz) * Rot(X=90) * Cylinder( + p.clamp_boss_dia / 2, p.clamp_boss_len + ) + part -= Pos(bx, p.wall + p.clamp_boss_len - hole_depth / 2, bz) * Rot( + X=90 + ) * Cylinder(p.clamp_screw_dia / 2, hole_depth) + + return part + + +# --------------------------------------------------------------------------- # +# preview render (best-effort PNG from the exported STL) +# --------------------------------------------------------------------------- # +def render_preview(stl_path: Path, png_path: Path) -> None: + """Shade the exported binary STL and save a 4-view PNG for review.""" + import struct + + import matplotlib + import numpy as np + + matplotlib.use("Agg") + import matplotlib.pyplot as plt + from mpl_toolkits.mplot3d.art3d import Poly3DCollection + + with open(stl_path, "rb") as fh: + fh.read(80) + (n_tri,) = struct.unpack(" None: + ok, msg = p.fits_bed() + bb = part.bounding_box() + print("wedge enclosure") + print(f" envelope (params) : {msg} -> {'FITS' if ok else 'TOO BIG'}") + print(f" solid bbox : {bb.size.X:.2f} x {bb.size.Y:.2f} x {bb.size.Z:.2f} mm") + print(f" volume : {part.volume / 1000.0:.1f} cm^3") + print(f" TEG stack : {p.teg_count} x TG12-4 " + f"({p.teg_len} x {p.teg_wid} x {p.teg_thk} mm)") + print(f" clamp load : {p.clamp_pressure_mpa:g} MPa -> " + f"{p.clamp_force_n():.0f} N total, " + f"{p.clamp_force_per_screw_n():.0f} N per M4 screw " + f"({p.clamp_screw_count} screws)") + floor = p.wall - (p.magnet_thk + p.magnet_clearance) + print(f" magnet pocket : {p.magnet_dia:g} x {p.magnet_thk:g} mm SmCo, " + f"{floor:.2f} mm floor behind pocket") + if floor < 1.0: + raise SystemExit("ERROR: magnet pocket breaks through the front wall (T4)") + if not ok: + raise SystemExit("ERROR: part exceeds the printer bed (P1)") + + +# --------------------------------------------------------------------------- # +# main +# --------------------------------------------------------------------------- # +def main(argv: list[str] | None = None) -> int: + ap = argparse.ArgumentParser(description=__doc__.splitlines()[0]) + ap.add_argument("--params", type=Path, help="JSON file overriding defaults") + ap.add_argument("--out", type=Path, default=HERE / "exports", + help="output directory (default cad/exports)") + ap.add_argument("--no-export", action="store_true", + help="build + report only, write nothing") + ap.add_argument("--no-render", dest="render", action="store_false", + help="skip the PNG preview render") + ap.set_defaults(render=True) + args = ap.parse_args(argv) + + p = WedgeParams.from_json_file(args.params) if args.params else DEFAULTS + part = build_wedge(p) + report(p, part) + + if not args.no_export: + args.out.mkdir(parents=True, exist_ok=True) + step_path = args.out / f"{p.export_stem}.step" + stl_path = args.out / f"{p.export_stem}.stl" + export_step(part, str(step_path)) + export_stl(part, str(stl_path)) + print(f" wrote : {step_path}") + print(f" wrote : {stl_path}") + + if args.render and not args.no_export: + png = args.out / f"{p.export_stem}.png" + try: + render_preview(stl_path, png) + print(f" wrote : {png}") + except Exception as exc: # rendering is best-effort, never fatal + print(f" render skipped : {exc}") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main()) diff --git a/docs/cad-toolchain.md b/docs/cad-toolchain.md new file mode 100644 index 0000000..e4a6973 --- /dev/null +++ b/docs/cad-toolchain.md @@ -0,0 +1,224 @@ +# CAD toolchain — code-CAD for the TEG wedge and printed parts + +An AI agent can author and edit the **wedge enclosure** and its printed parts in +this repository, and export both a **STEP** (design interchange) and a printable +**STL** — with no human in the loop. This document is the contract for that +toolchain: the tool we chose, where the source of truth lives, how exports reach +the print task, and the conventions to follow. + +Related: [REQUIREMENTS.md](../REQUIREMENTS.md) (P1–P5, T1–T5, S1–S4 and §8), +issue **LAZ-24**, and the Bambu print task that consumes the STL. + +--- + +## 1. Decision: build123d (code-CAD) + +| Option | Verdict | +|--------|---------| +| **build123d** (Python, OpenCASCADE) | **Chosen.** Scriptable, headless, git-diffable source — matches this repo's script-heavy KiCad generators (`scripts/gen_schematic.py`, `scripts/gen_board.py`). | +| FreeCAD | Scriptable, but a heavyweight GUI app to install and drive; no advantage over a bare library here. | +| Onshape | Cloud SaaS; needs a human-owned account and network auth — awkward for unattended agents. | +| Fusion 360 | Cloud, script/API limited, licence-gated. | + +**build123d** is a modern layer over the same OCCT kernel as CadQuery and is +under active development, so it is the pick. A model is a Python program: the +geometry diff is the source diff, reviewable in a pull request. + +The toolchain is **repo-local and sudo-free**: `scripts/cad-setup.sh` creates +`.venv/` with `uv` and installs `cad/requirements.txt` (build123d + matplotlib). +The only non-Python step is unpacking a few headless GL/X libraries that OCCT +links against but that a server often lacks — still no root. + +## 2. Where the source of truth lives + +``` +cad/ + parameters.py # every dimension: the single place to edit numbers + wedge.py # the model: builds the part, exports STEP/STL/PNG + requirements.txt # pinned toolchain + exports/ # committed build output (see §4) + wedge_enclosure.step + wedge_enclosure.stl + wedge_enclosure.png +scripts/ + cad-setup.sh # one-time bootstrap of .venv/ + GL libs + cad-run.sh # run the model with the right env +``` + +`cad/parameters.py` is authoritative. `WedgeParams` is a frozen dataclass whose +defaults are the design; `cad/wedge.py` reads it and builds the solid. Changing a +number is the whole diff. + +## 3. Running it + +```bash +scripts/cad-setup.sh --dev # once per host: create .venv, install deps + dev tools +scripts/cad-run.sh # build default part -> cad/exports/*.{step,stl,png} +scripts/cad-run.sh --no-render # faster, no PNG +scripts/cad-run.sh --params cad/params.json # override parameters (JSON) +scripts/cad-test.sh # geometry tests (pytest) +scripts/cad-lint.sh # ruff + mypy +``` + +`--params` reads a JSON object whose keys are `WedgeParams` field names; unknown +keys are rejected so a typo cannot silently change nothing: + +```json +{ "width": 160.0, "teg_count": 3, "fan_size": 92.0 } +``` + +The model prints an envelope check and **fails loudly** if the part exceeds the +printer bed (P1) or if a magnet pocket would break through the front wall (T4). + +## 4. Export pipeline (how the print task gets its STL) + +`cad/wedge.py` writes three files into `cad/exports/`: + +| File | Consumer | +|------|----------| +| `wedge_enclosure.step` | Human CAD / editing interchange; re-import into any CAD tool. | +| `wedge_enclosure.stl` | **The printable mesh — the input to the Bambu print task.** | +| `wedge_enclosure.png` | 4-view preview for review in the issue/PR. | + +The STL is committed on purpose so the print task (and reviewers) can consume a +fixed artifact without re-running the toolchain. It is a binary STL in +millimetres, exported with the default resolution. + +> Conventions for printability: model in **millimetres**, Z up, the open bottom +> on the bed (Z=0). Slicer/printer settings live in the print task, not here. + +### 4.1 Validation and CI + +Committed exports are checked, not assumed. `scripts/validate.sh --cad` runs +`scripts/validate_cad.py`, which verifies that every committed STL is a closed, +consistently wound, single-body mesh; sits on Z=0 and fits the A1 mini bed; +matches the STEP volume and envelope; and still matches a fresh rebuild of +`cad/wedge.py`. A stale artifact fails with the exact regeneration command. + +GitHub Actions runs this on every pull request +([`.github/workflows/validate.yml`](../.github/workflows/validate.yml)) next to +the KiCad ERC/DRC and script-syntax jobs. Full contract: +**[docs/validation.md](validation.md)**. + +### 4.2 Code quality gate (ruff, mypy, pytest) + +The model is Python, so it is linted and tested like Python — no bespoke CAD +linter required. All three tools are pinned in `cad/requirements-dev.txt` and +configured once in `pyproject.toml`: + +| Tool | What it proves | Command | +|------|----------------|---------| +| **ruff** | imports, unused names, bugbear traps, pyupgrade on `cad/` and `tests/` | `scripts/cad-lint.sh` | +| **mypy** | type consistency in `cad/parameters.py`, `cad/wedge.py`, `tests/`; kernel bindings are treated as a trusted third-party surface | `scripts/cad-lint.sh` | +| **pytest** | the *solid*, not the source: one valid body, envelope vs the 180 mm bed, wall thickness, rebate depth, four magnet pockets with an intact floor, retention holes, fan bore/mounts, clamp bosses, §8 clamp load, and a golden volume | `scripts/cad-test.sh` | + +The two halves are complementary: `validate_cad.py` checks the committed +*artifacts* (watertight mesh, STEP↔STL agreement, freshness), while pytest checks +the *generated solid* feature by feature, so a broken feature fails with a named +test rather than as a volume drift. + +`pre-commit` runs lint on commit and the geometry tests on push +(`.pre-commit-config.yaml`, using the repo `.venv`), and CI runs both in the +`quality` job. + +## 5. Conventions + +- **Units:** millimetres everywhere. +- **Axes:** X = width, Y = depth (0 at the hot face), Z = height (0 at the base). + See the docstring in `cad/parameters.py`. +- **One part, one module.** The wedge is `cad/wedge.py`; add further printed + parts as sibling modules and export them the same way. +- **No magic numbers in `wedge.py`** — derive from `WedgeParams`; if a value is + needed, add a field (with a unit comment) to `parameters.py`. +- **Best-effort render.** Preview rendering never fails the build. +- **Estimates are marked.** Values not yet datasheet-verified carry `(estimate)`, + matching the convention in `REQUIREMENTS.md`. + +## 6. How the model maps to requirements + +| Requirement | How the model satisfies it | +|-------------|----------------------------| +| **P1** fits the A1 mini 180³ bed | `fits_bed()` checks the envelope; default 150 × 55 × 150 mm. The build aborts if it grows past the bed. | +| **P2** wedge | Trapezoid profile: full height (150 mm) at the flat hot face, tapering to 100 mm at the cold-side back face. | +| **P5** fan-forced cooling | Ø76 mm fan bore + 71.5 mm Noctua NF-A8 mounting holes in the back face. | +| **T1/T2/T5** keep plastic off the hot path | The *metal* interface plate sits in a 96 × 96 mm rebate in the front face; printed plastic never bears the hot face, and a `thermal_break_gap` air gap separates plate and pocket. | +| **T4** SmCo magnets survive | Four 10 × 3 mm magnet pockets in the front rim; the build refuses if the pocket floor is under 1 mm. | +| **S2** mechanical retention | Four M3 through-holes at the corners as a positive backup to the magnets. | +| **§8** clamp the TEG stack at 1.4 MPa | Four M4 clamp bosses carry the load; the model reports total force (~2857 N) and per-screw load. | + +## 7. §8 clamp load (why the bosses are there) + +The Coherent TG12-4 datasheet specifies a **1.4 MPa (200 psi)** clamp on the +module's 34.01 × 30 mm face. With two modules that is ~**2.9 kN** — a real +mechanical load the enclosure carries, not a suggestion. The four M4 bosses take +~714 N each; the clamp plate that presses the stack is a separate part (metal), +not modelled here. + +## 8. Status & next steps + +- ✅ Tool chosen (build123d, confirmed by the user), source layout established, + exports wired. +- ✅ Parameterised wedge builds and exports STEP + STL, fits the bed. +- ✅ Committed artifacts validated in CI (manifold mesh, bed fit, STEP↔STL, + stale-export rebuild). +- ✅ Code-quality gate: ruff + mypy (static) and pytest (geometry), wired into + pre-commit and a dedicated CI job; printable STL/STEP/PNG uploaded as + workflow artifacts. +- ✅ GUI/editor review path: VS Code OCP CAD Viewer for live preview and + step-through debugging (§10). +- ⬜ **Hand the STL to the Bambu print task** (sibling issue) — the artifact is + committed in `cad/exports/`. +- ⬜ Extract the TG12-4 mechanical drawing (datasheet p.3) to confirm the module + footprint and the array envelope (see REQUIREMENTS.md open items 5). +- ⬜ Choose the SmCo magnet grade once the fireplace surface temperature is known + (T4). +- ⬜ Split the enclosure into front/back shells and add the metal interface plate + and clamp plate as their own parts. +- ⬜ 3MF export. build123d 0.13 ships the Lib3MF binding but has no + `export_3mf()` one-liner; the Bambu print task consumes STL today. Add a small + exporter when a multi-object/print-settings 3MF is actually needed. + +## 9. Prior art in this repo + +The KiCad pipeline already proves the pattern this toolchain follows: **source is +a script, output is generated**. `scripts/gen_board.py` regenerates `TEG.kicad_pcb` +the same way `cad/wedge.py` regenerates the STEP/STL. Keep CAD source and exports +in the same commit. + +## 10. Editing and review in a GUI + +The workflow is **code-first with a live viewer**. No mature tool round-trips +click-and-drag edits back into build123d source, so the source of truth stays the +Python; the GUI is for looking, measuring and reviewing. + +### VS Code — OCP CAD Viewer (primary) + +The extension is recommended in `.vscode/extensions.json` +(`bernhard-42.ocp-cad-viewer`). It renders build123d and refreshes +when the script runs. + +```bash +uv pip install --python .venv/bin/python ocp-vscode # Python side, matches the extension +``` + +```python +from ocp_vscode import show +from wedge import build_wedge +from parameters import DEFAULTS + +show(build_wedge(DEFAULTS)) +``` + +- **Ctrl-F5** (Run Without Debugging) rebuilds and re-renders. +- **F5** (Start Debugging) steps through the model with the view updating, which + is how to find the operation that produced a bad face. +- The viewer shows exact topology (faces/edges), supports sectioning, and + measures volume and bounding box on the tessellated mesh. + +On a headless Linux box, start VS Code from a shell that has the GL path +exported (the same one `scripts/cad-run.sh` sets): + +```bash +export LD_LIBRARY_PATH="$PWD/.venv/gl-libs/usr/lib/x86_64-linux-gnu" +code . +``` diff --git a/docs/jlcpcb-fabrication.md b/docs/jlcpcb-fabrication.md new file mode 100644 index 0000000..569b4a8 --- /dev/null +++ b/docs/jlcpcb-fabrication.md @@ -0,0 +1,114 @@ +# JLCPCB fabrication & ordering — end-to-end flow + +**Status:** tooling in place (2026-10-14). The v2 ~3–4 W power board does not exist +yet, so this is proven against the sub-watt reference board; the same command applies +unchanged once `hardware/TEG.kicad_pcb` becomes the v2 board. + +**Goal:** any agent can turn the KiCad board into a **review-ready JLCPCB package** +(Gerbers + drill + BOM + CPL), and the **order** — which spends money — is placed +only with explicit human approval. + +--- + +## 1. What is automated vs. manual + +| Step | Automated? | How | +|------|------------|-----| +| Part sourcing / stock | ✅ | `scripts/jlc_lookup.py` (JLCPCB's own parts API) | +| Gerbers + drill export | ✅ | `scripts/fab_export.sh` → `kicad-cli` | +| Pick-and-place (CPL) | ✅ | `scripts/fab_export.sh` → `kicad-cli` + `scripts/jlc_cpl.py` | +| JLCPCB BOM | ✅ | `scripts/fab_export.sh` → `scripts/jlc_bom.py` | +| Package for upload | ✅ | `scripts/fab_export.sh` → `build/fab/-gerbers.zip` | +| **Placing the order** | ❌ manual | jlcpcb.com, behind the approval gate (§5) | + +There is **no unattended ordering**. JLCPCB has an official ordering API +(see §5), but it is application-gated and not wired here; if access is granted it +can be added *behind the same approval gate*. + +## 2. Prerequisites + +- `kicad-cli` (KiCad 8+) on `PATH`, or set `KICAD_CLI=/path/to/kicad-cli`. +- `python3` (standard library only). + +## 3. The one command + +```bash +scripts/fab_export.sh # hardware/TEG.kicad_pcb -> build/fab/ +scripts/fab_export.sh path/to/board.kicad_pcb out/dir # another board/dir +scripts/fab_export.sh --tht # include through-hole parts in BOM+CPL +``` + +It runs: gerbers → Excellon drill → `pcb export pos` → CPL conversion → BOM +generation → zip, and prints the output paths. It never uploads or orders. + +### Outputs (`build/fab/`) + +| File | For | +|------|-----| +| `-gerbers.zip` | JLCPCB **PCB** upload ("add gerber file"): Gerbers + drill + `.gbrjob` | +| `-BOM-jlcpcb.csv` | JLCPCB **assembly** step — `Comment,Designator,Footprint,LCSC Part #` | +| `-CPL-jlcpcb.csv` | JLCPCB **assembly** step — `Designator,Val,Package,Mid X,Mid Y,Rotation,Layer` | +| `-pos.csv` | Raw KiCad position file (kept for reference) | + +`build/` is gitignored; regenerate any time. Package/logic-only files are produced by +`scripts/jlc_bom.py` and `scripts/jlc_cpl.py`, which can be run standalone. + +### SMT-only vs. through-hole + +Default is **SMT-only assembly**: `kicad-cli ... --smd-only` drops through-hole parts +(e.g. the reference board's `J1`/`J2`/`J3` connectors) from the CPL, and the BOM is +restricted to the same designators so the two files agree. JLCPCB rejects a BOM that +lists a part missing from the CPL. If a build uses JLCPCB's THT add-on, pass `--tht` +so both files include the through-hole parts. + +## 4. Verify before ordering (checklist) + +- [ ] `scripts/validate.sh` — schematic ERC and board DRC are clean (cosmetic + warnings excepted, see README). +- [ ] `-BOM-jlcpcb.csv` — every row has an LCSC id; quantities/designators match + the board. +- [ ] `-CPL-jlcpcb.csv` — one row per placed part; **Layer** and **Rotation** look + right in JLCPCB's assembly preview. +- [ ] **CPL rotations.** KiCad and JLCPCB disagree on the zero-rotation convention for + some packages. Always confirm against JLCPCB's assembly viewer (or KiCad's + Fabrication Toolkit) before paying — this is a classic source of misplacement. +- [ ] **Shared origin.** Gerbers and CPL must use the same coordinate origin or the + parts land off the board. The board's aux/grid origin is `0,0`; if that changes, + export both with a matching origin. +- [ ] Re-check part stock with `python3 scripts/jlc_lookup.py ""` — stock drifts; + the reference board's `U1` (BQ25504, `C157471`) has run low before. +- [ ] BOM total ≤ $200 (REQUIREMENTS M6). + +## 5. Placing the order (approval-gated) + +**Default path — manual, user-approved:** + +1. Agent produces and reviews the package (§3–§4). +2. Agent asks the board to approve the order (cost, quantity, shipping). +3. On approval, the **user** uploads `build/fab/*.zip` and the BOM/CPL to + , confirms the assembly preview, and pays. +4. Order confirmation is recorded back on the task. + +**Never place an order unattended.** Spend and account actions stay behind the normal +Paperclip approval gate. + +**Possible automation (needs access first).** JLCPCB runs an official **Open Platform +API** (`api.jlcpcb.com`) covering Gerber upload → price quote → create order, but +**access is application-gated** (partner review based on order history/company, not +self-serve). It is **not** in the Paperclip connections catalogue. If the user obtains +credentials, we can automate the upload + quote steps and keep **order creation** behind +the same approval gate. Until then, ordering is manual. + +## 6. When the v2 board is ready + +1. Replace `hardware/TEG.kicad_pcb` + `.kicad_sch` with the routed v2 board. +2. Run `scripts/validate.sh`, then `scripts/fab_export.sh`. +3. Work the §4 checklist, then the §5 approval flow. + +The v2 board's USB-A/C connectors are SMD catalogue parts, so it should assemble with +the default SMT-only flow. + +--- + +*Related: [README.md](../README.md) (fabrication outputs), [PLAN.md](../PLAN.md) §7, +[REQUIREMENTS.md](../REQUIREMENTS.md) §5 (M1–M6), [BOM.md](../BOM.md).* diff --git a/docs/validation.md b/docs/validation.md new file mode 100644 index 0000000..c3e037e --- /dev/null +++ b/docs/validation.md @@ -0,0 +1,99 @@ +# Validation pipeline — what CI checks, and how to run it locally + +Every push to `main` and every pull request runs +[`.github/workflows/validate.yml`](../.github/workflows/validate.yml). The same +checks run locally through one entry point: + +```bash +scripts/cad-setup.sh --dev # once per host: .venv with build123d, ruff, mypy, pytest +scripts/cad-lint.sh # ruff + mypy on the model code +scripts/cad-test.sh # geometry tests on the generated solid +scripts/validate.sh # CAD artifacts + KiCad ERC/DRC +scripts/validate.sh --cad # mechanical CAD only +scripts/validate.sh --hardware # ERC/DRC only +``` + +Exit codes: `0` pass, `1` validation failure, `2` a required toolchain is +missing. The job split mirrors the two toolchains, so a CAD failure and a KiCad +failure are reported independently. + +## Jobs + +| Job | Toolchain | Command | +|-----|-----------|---------| +| `cad` | Python 3.13 + pinned `build123d` in `.venv/` | `scripts/validate.sh --cad` | +| `quality` | same `.venv` + pinned `ruff`/`mypy`/`pytest` | `scripts/cad-lint.sh`, then `scripts/cad-test.sh` | +| `hardware` | KiCad 10 (`kicad-cli`) from the official PPA | `scripts/validate.sh --hardware`, then `scripts/fab_export.sh` | +| `scripts` | Python + bash | `bash -n` every script, `compileall` the Python sources | + +The CAD job uploads `build/cad-validation.json` and the printable artifacts +(`cad/exports/wedge_enclosure.{stl,step,png}`). The hardware job uploads the +full ERC/DRC reports (`build/erc-all.rpt`, `build/drc-all.rpt`, plus the +error-gated `build/erc.rpt` and `build/drc.rpt`) and the generated JLCPCB +package (`TEG-gerbers.zip`, BOM, CPL). Everything is retained as run artifacts +for review evidence. + +## What the CAD checks prove + +`scripts/validate_cad.py` checks the **committed** artifacts, not just a fresh +build: + +1. **Parameters are valid** — `WedgeParams.validate()`, bed fit (P1), and the + magnet pocket floor (T4, must stay ≥ 1 mm). +2. **Artifacts exist and parse** — `wedge_enclosure.step` and `.stl` for the + canonical build123d model. +3. **The STL is printable geometry** — binary/ASCII parsing, no degenerate + triangles, every edge shared by exactly two oppositely wound triangles, and + a single connected body. Vertices are welded at 0.1 µm first, because STL is + a triangle soup and exporters do not share vertices. +4. **It fits the printer** — millimetre envelope, sits on `Z=0`, and fits the + Bambu A1 mini 180 mm cube. +5. **STEP and STL agree** — the STEP re-imports through OCCT and matches the + mesh volume (0.2 %) and envelope (0.05 mm). +6. **The exports are fresh** (`--rebuild`) — the canonical model is rebuilt in a + temp directory and its STL volume, surface area, and envelope must match the + committed STL. This is what catches "I changed `parameters.py` but forgot to + re-run `scripts/cad-run.sh`". + +Tolerances are deliberately loose enough to survive OCCT version skew and +different tessellation of the same B-rep, but tight enough that a dropped +feature or stale export fails. + +### Fixing a CAD failure + +| Failure | Fix | +|---------|-----| +| `committed STL is stale` | `scripts/cad-run.sh` then commit `cad/exports/` | +| `mesh is not a closed ... surface` | Re-export the STL; if it persists, the source solid is not manifold | +| `envelope ... exceeds the ... bed` | Change `cad/parameters.py`; the model refuses to build an oversized part | +| `STEP volume ... differs from STL` | Re-export both from the same source revision | +| `missing STL/STEP` | Restore the artifact or add the newly introduced process to the registry in `scripts/validate_cad.py` | +| `.venv` missing | `scripts/cad-setup.sh` | + +## What the hardware checks prove + +`scripts/validate.sh --hardware` runs `kicad-cli sch erc` and +`kicad-cli pcb drc`. The **error** severity gates the build; warnings are +reported and do not fail it. The repo currently carries two known cosmetic +warnings, documented in [README.md](../README.md#opening-the-project): + +- 3 × `lib_symbol_mismatch` on recently fetched symbols (embedded text is + byte-identical to the library), +- 1 × `silk_overlap` on the 8 mm electrolytic's reference text. + +Anything at error severity, or any non-`0`/`5` `kicad-cli` exit (which means a +tool/IO failure rather than a violation), fails the job. + +After ERC/DRC the job runs `scripts/fab_export.sh`, which exercises the whole +manufacturing export path: Gerbers, Excellon drill, pick-and-place, the JLCPCB +CPL, the BOM restricted to the CPL designators, and the zipped upload package. +It **does not order anything**; the package is uploaded as a build artifact for +review. The ordering gate in +[docs/jlcpcb-fabrication.md](jlcpcb-fabrication.md) is unchanged. + +## Deliberately out of scope + +The pipeline does not slice the STL or simulate the print, does not order +boards or parts, and does not validate datasheet claims. Those stay human +review and approval steps. It also does not check 3D renders/PNGs — those are +best-effort previews, not manufacturing artifacts. diff --git a/pyproject.toml b/pyproject.toml new file mode 100644 index 0000000..6dc1299 --- /dev/null +++ b/pyproject.toml @@ -0,0 +1,50 @@ +# Tooling config for the code-CAD sources. This repo is not a Python package: +# the file exists so ruff, mypy and pytest share one source of conventions. + +[tool.ruff] +line-length = 100 +target-version = "py311" +extend-exclude = [ + ".venv", +] + +[tool.ruff.lint] +select = [ + "E4", "E7", "E9", # pycodestyle errors + "E402", # module import not at top (the sys.path shims need it) + "F", # pyflakes + "I", # import sorting + "B", # bugbear + "UP", # pyupgrade +] + +[tool.mypy] +python_version = "3.11" +files = ["cad/wedge.py", "cad/parameters.py", "tests"] +mypy_path = "cad" +ignore_missing_imports = true +check_untyped_defs = true +warn_redundant_casts = true +warn_unused_ignores = false +show_error_codes = true + +# The kernel bindings are large C++ extensions with incomplete stubs; treat the +# third-party surface as trusted and only type-check our own model code. +[[tool.mypy.overrides]] +module = [ + "build123d", + "build123d.*", + "OCP", + "OCP.*", + "matplotlib", + "matplotlib.*", + "mpl_toolkits.*", + "numpy", + "numpy.*", +] +follow_imports = "skip" +ignore_missing_imports = true + +[tool.pytest.ini_options] +testpaths = ["tests"] +addopts = "-q" diff --git a/scripts/cad-lint.sh b/scripts/cad-lint.sh new file mode 100755 index 0000000..14cea54 --- /dev/null +++ b/scripts/cad-lint.sh @@ -0,0 +1,20 @@ +#!/usr/bin/env bash +# Static analysis for the code-CAD sources: ruff + mypy (config in pyproject.toml). +# +# scripts/cad-lint.sh +# +# Needs the repo-local .venv with the dev tools: +# scripts/cad-setup.sh --dev +set -euo pipefail +cd "$(dirname "$0")/.." +VENV="$PWD/.venv" + +if [ ! -x "$VENV/bin/ruff" ] || [ ! -x "$VENV/bin/mypy" ]; then + echo "cad-lint: dev tools missing - run scripts/cad-setup.sh --dev" >&2 + exit 2 +fi + +echo "== ruff ==" +"$VENV/bin/ruff" check cad tests +echo "== mypy ==" +"$VENV/bin/mypy" diff --git a/scripts/cad-run.sh b/scripts/cad-run.sh new file mode 100755 index 0000000..bf399b6 --- /dev/null +++ b/scripts/cad-run.sh @@ -0,0 +1,21 @@ +#!/usr/bin/env bash +# Run the CAD model with the repo-local toolchain (build123d in .venv/). +# +# scripts/cad-run.sh # build default part, export +# scripts/cad-run.sh --no-render # skip the PNG preview +# scripts/cad-run.sh --params cad/params.json # override parameters +# scripts/cad-run.sh --out cad/exports # output directory +# +# Installs nothing; run scripts/cad-setup.sh once first. +set -euo pipefail +cd "$(dirname "$0")/.." +REPO="$PWD" +VENV="$REPO/.venv" + +if [ ! -x "$VENV/bin/python" ]; then + echo "cad-run: no .venv yet - run scripts/cad-setup.sh first" >&2 + exit 1 +fi + +export LD_LIBRARY_PATH="$VENV/gl-libs/usr/lib/x86_64-linux-gnu${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}" +exec "$VENV/bin/python" "$REPO/cad/wedge.py" "$@" diff --git a/scripts/cad-setup.sh b/scripts/cad-setup.sh new file mode 100755 index 0000000..1013a6c --- /dev/null +++ b/scripts/cad-setup.sh @@ -0,0 +1,79 @@ +#!/usr/bin/env bash +# Bootstrap the repo-local CAD toolchain (build123d, code-CAD) with no sudo. +# +# scripts/cad-setup.sh # model toolchain only +# scripts/cad-setup.sh --dev # + ruff, mypy, pytest for scripts/cad-lint.sh +# +# Creates .venv/ (Python 3.11-3.14), installs cad/requirements.txt, and stages the +# couple of system GL/X libraries the OpenCASCADE kernel links against but that a +# headless box often lacks. It is idempotent - safe to re-run. +# +# Why a local venv: nothing here needs root, and .venv/ is gitignored, so the repo +# stays source-only while any agent on any host can reproduce the exact toolchain. +set -euo pipefail +cd "$(dirname "$0")/.." +REPO="$PWD" +VENV="$REPO/.venv" +GLLIB="$VENV/gl-libs" + +DEV=0 +for arg in "$@"; do + case "$arg" in + --dev) DEV=1 ;; + -h|--help) + sed -n '2,9p' "$0" | sed 's/^# \{0,1\}//' + exit 0 ;; + *) + echo "cad-setup: unknown argument: $arg" >&2 + exit 2 ;; + esac +done + +say() { printf 'cad-setup: %s\n' "$*"; } + +# --- uv (fast, no-sudo Python/venv manager) -------------------------------- +if ! command -v uv >/dev/null 2>&1; then + export PATH="$HOME/.local/bin:$PATH" +fi +if ! command -v uv >/dev/null 2>&1; then + say "installing uv to ~/.local/bin" + curl -LsSf https://astral.sh/uv/install.sh | sh + export PATH="$HOME/.local/bin:$PATH" +fi + +# --- virtualenv + Python packages ------------------------------------------- +if [ ! -x "$VENV/bin/python" ]; then + say "creating virtualenv at .venv" + uv venv --python 3.13 "$VENV" +fi +say "installing cad/requirements.txt" +uv pip install --python "$VENV/bin/python" -r "$REPO/cad/requirements.txt" + +if [ "$DEV" -eq 1 ]; then + say "installing cad/requirements-dev.txt" + uv pip install --python "$VENV/bin/python" -r "$REPO/cad/requirements-dev.txt" +fi + +# --- headless GL/X runtime for OpenCASCADE ---------------------------------- +# OCP (the OCCT binding behind build123d) links libGL.so.1, which pulls libGLX -> +# libX11. A headless CI box has none of them. Download the Debian/Ubuntu packages +# and unpack them locally - no root, no system change. +if [ ! -e "$GLLIB/usr/lib/x86_64-linux-gnu/libGL.so.1" ]; then + say "staging headless GL/X libraries into .venv/gl-libs" + tmp="$(mktemp -d)" + ( cd "$tmp" + for pkg in libgl1 libglvnd0 libglx0 libx11-6 libxcb1 libxau6 libxdmcp6 libbsd0; do + apt-get download "$pkg" >/dev/null 2>&1 || say "warn: could not fetch $pkg" + done ) + for deb in "$tmp"/*.deb; do [ -e "$deb" ] && dpkg-deb -x "$deb" "$GLLIB"; done + rm -rf "$tmp" +else + say "GL/X libraries already staged" +fi + +export LD_LIBRARY_PATH="$GLLIB/usr/lib/x86_64-linux-gnu${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}" +"$VENV/bin/python" - <<'PY' +import build123d # noqa: F401 +print("cad-setup: build123d", build123d.__version__, "imports OK (via scripts/cad-run.sh)") +PY +say "done - run 'scripts/cad-run.sh --help'" diff --git a/scripts/cad-test.sh b/scripts/cad-test.sh new file mode 100755 index 0000000..079494a --- /dev/null +++ b/scripts/cad-test.sh @@ -0,0 +1,22 @@ +#!/usr/bin/env bash +# Geometry tests for the code-CAD sources (pytest, config in pyproject.toml). +# +# scripts/cad-test.sh # all tests +# scripts/cad-test.sh tests/test_wedge.py -k magnet +# +# Sets the headless GL/X library path that OpenCASCADE needs, then runs pytest. +set -euo pipefail +cd "$(dirname "$0")/.." +VENV="$PWD/.venv" + +if [ ! -x "$VENV/bin/python" ]; then + echo "cad-test: no .venv yet - run scripts/cad-setup.sh --dev first" >&2 + exit 2 +fi +if [ ! -x "$VENV/bin/pytest" ]; then + echo "cad-test: pytest missing - run scripts/cad-setup.sh --dev" >&2 + exit 2 +fi + +export LD_LIBRARY_PATH="$VENV/gl-libs/usr/lib/x86_64-linux-gnu${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}" +exec "$VENV/bin/python" -m pytest "$@" diff --git a/scripts/fab_export.sh b/scripts/fab_export.sh new file mode 100755 index 0000000..8115d59 --- /dev/null +++ b/scripts/fab_export.sh @@ -0,0 +1,129 @@ +#!/usr/bin/env bash +# Produce a review-ready JLCPCB fabrication + assembly package for a KiCad board in +# one command: +# +# * Gerbers + Excellon drill (+ .gbrjob) -> build/fab/-gerbers.zip (PCB upload) +# * JLCPCB BOM -> build/fab/-BOM-jlcpcb.csv (assembly step) +# * JLCPCB CPL -> build/fab/-CPL-jlcpcb.csv (assembly step) +# +# It does NOT place an order. Ordering is a separate, human-approved step; see +# docs/jlcpcb-fabrication.md and keep any spend behind the approval gate. +# +# Usage: +# scripts/fab_export.sh [BOARD] [OUTDIR] [--tht] +# BOARD KiCad .kicad_pcb (default: hardware/TEG.kicad_pcb) +# OUTDIR output directory (default: build/fab) +# --tht include through-hole parts in the BOM+CPL. Default is SMT-only +# assembly: THT parts are dropped from BOTH files so they agree +# (JLCPCB rejects a BOM listing a part that is not in the CPL). +# +# Env: +# KICAD_CLI path to kicad-cli (default: found on PATH, else the macOS app bundle) +set -euo pipefail +cd "$(dirname "$0")/.." + +THT=0 +POS=() +for a in "$@"; do + case "$a" in + --tht) THT=1 ;; + -h|--help) + cat <<'EOF' +Produce a review-ready JLCPCB fabrication + assembly package for a KiCad board. + +Usage: scripts/fab_export.sh [BOARD] [OUTDIR] [--tht] + BOARD KiCad .kicad_pcb (default: hardware/TEG.kicad_pcb) + OUTDIR output directory (default: build/fab) + --tht include through-hole parts in the BOM+CPL. Default is SMT-only + assembly: THT parts are dropped from BOTH files so they agree + (JLCPCB rejects a BOM listing a part that is not in the CPL). + +Outputs (in OUTDIR): -gerbers.zip, -BOM-jlcpcb.csv, +-CPL-jlcpcb.csv. It never uploads or orders -- see +docs/jlcpcb-fabrication.md. + +Env: KICAD_CLI path to kicad-cli (default: PATH, else the macOS app bundle). +EOF + exit 0 ;; + *) POS+=("$a") ;; + esac +done +BOARD="${POS[0]:-hardware/TEG.kicad_pcb}" +OUTDIR="${POS[1]:-build/fab}" + +KICAD_CLI="${KICAD_CLI:-$(command -v kicad-cli || true)}" +if [ -z "${KICAD_CLI}" ] && [ -x "$HOME/Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli" ]; then + KICAD_CLI="$HOME/Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli" +fi +if [ -z "${KICAD_CLI}" ] || [ ! -x "${KICAD_CLI}" ]; then + echo "error: kicad-cli not found. Install KiCad or set KICAD_CLI=/path/to/kicad-cli" >&2 + exit 1 +fi +[ -f "$BOARD" ] || { echo "error: board not found: $BOARD" >&2; exit 1; } +SCH="${BOARD%.kicad_pcb}.kicad_sch" +[ -f "$SCH" ] || { echo "error: schematic not found: $SCH" >&2; exit 1; } +BASE="$(basename "$BOARD" .kicad_pcb)" + +mkdir -p "$OUTDIR" +echo "== JLCPCB fab export ==" +echo "board : $BOARD" +echo "out : $OUTDIR" +echo "using : $KICAD_CLI" +"$KICAD_CLI" version +echo + +# 1. Gerbers. Protel filename extensions (the default) are what JLCPCB expects. +echo "-- gerbers" +"$KICAD_CLI" pcb export gerbers -o "$OUTDIR/" "$BOARD" + +# 2. Excellon drill, millimetres. +echo "-- drill" +"$KICAD_CLI" pcb export drill --format excellon --excellon-units mm -o "$OUTDIR/" "$BOARD" + +# 3. Pick & place. SMT-only by default (drops through-hole parts like connectors). +echo "-- pick & place" +if [ "$THT" -eq 1 ]; then + "$KICAD_CLI" pcb export pos --format csv --units mm -o "$OUTDIR/$BASE-pos.csv" "$BOARD" +else + "$KICAD_CLI" pcb export pos --format csv --units mm --smd-only -o "$OUTDIR/$BASE-pos.csv" "$BOARD" +fi + +# 4. Convert the KiCad position file to JLCPCB's CPL format. +echo "-- CPL (JLCPCB)" +CPL="$OUTDIR/$BASE-CPL-jlcpcb.csv" +python3 scripts/jlc_cpl.py "$OUTDIR/$BASE-pos.csv" -o "$CPL" + +# 5. JLCPCB BOM from the schematic, restricted to the CPL designators so the two +# assembly files always agree. +echo "-- BOM (JLCPCB)" +BOM="$OUTDIR/$BASE-BOM-jlcpcb.csv" +python3 scripts/jlc_bom.py "$SCH" -o "$BOM" --designators-from "$CPL" + +# 6. Zip the PCB manufacturing files for the JLCPCB "add gerber" upload. +echo "-- package" +ZIP="$OUTDIR/$BASE-gerbers.zip" +rm -f "$ZIP" +python3 - "$ZIP" "$OUTDIR" "$BASE" <<'PY' +import glob, os, sys, zipfile +zip_path, outdir, base = sys.argv[1], sys.argv[2], sys.argv[3] +names = sorted( + glob.glob(os.path.join(outdir, base + "*.g*")) + + glob.glob(os.path.join(outdir, base + "*.drl")) + + glob.glob(os.path.join(outdir, base + "*.gbrjob")) +) +if not any(n.endswith((".gbl", ".gtl", ".gbr")) for n in names): + sys.exit("error: no gerber files were produced") +with zipfile.ZipFile(zip_path, "w", zipfile.ZIP_DEFLATED) as z: + for n in names: + z.write(n, os.path.basename(n)) +print(f"zipped {len(names)} files -> {zip_path}") +PY + +echo +echo "== done ==" +echo "PCB fab package : $ZIP" +echo "assembly BOM : $BOM" +echo "assembly CPL : $CPL" +echo +echo "Next: review the package, then order manually from JLCPCB (see" +echo "docs/jlcpcb-fabrication.md). Never place an order without approval." diff --git a/scripts/jlc_bom.py b/scripts/jlc_bom.py new file mode 100755 index 0000000..a1eecd9 --- /dev/null +++ b/scripts/jlc_bom.py @@ -0,0 +1,134 @@ +#!/usr/bin/env python3 +"""Build a JLCPCB assembly BOM CSV from a KiCad schematic. + +Reads each symbol instance's Reference, Value, Footprint and ``LCSC Part`` +property, groups identical parts, and emits JLCPCB's required columns: + + Comment,Designator,Footprint,LCSC Part # + +The ``LCSC Part`` property is written for every part by scripts/gen_schematic.py +(see the part/net table there). Symbols marked ``(in_bom no)`` (PWR_FLAGs) and +symbols without an LCSC id are skipped. + +``--designators-from CPL.csv`` restricts the output to the designators present in +a CPL, so a package's BOM and CPL always agree -- JLCPCB rejects a BOM that lists a +part missing from the CPL (e.g. through-hole connectors on an SMT-only build). + +Usage: + python3 scripts/jlc_bom.py hardware/TEG.kicad_sch -o build/fab/TEG-BOM-jlcpcb.csv + python3 scripts/jlc_bom.py SCH -o OUT --designators-from build/fab/TEG-CPL-jlcpcb.csv +""" +import argparse +import csv +import re +import sys +from collections import OrderedDict +from pathlib import Path + +sys.path.insert(0, str(Path(__file__).resolve().parent)) +from gen_schematic import parse_sexpr, unq # noqa: E402 (shared s-expr helpers) + + +def instance_symbols(root): + """Top-level symbol instances (not the copies under ``lib_symbols``).""" + doc = next((n for n in root if isinstance(n, list) and n and n[0] == "kicad_sch"), None) + if doc is None: + return + for node in doc[1:]: + if isinstance(node, list) and node and node[0] == "symbol": + yield node + + +def child(node, key): + for c in node: + if isinstance(c, list) and c and c[0] == key: + return c + return None + + +def props_of(node): + out = {} + for c in node: + if isinstance(c, list) and c and c[0] == "property": + out[unq(c[1])] = unq(c[2]) + return out + + +def natural_key(ref): + return [int(t) if t.isdigit() else t for t in re.split(r"(\d+)", ref)] + + +def collect(sch_path): + root, _ = parse_sexpr(Path(sch_path).read_text()) + # Key on the LCSC id (what JLCPCB actually sources) + footprint, so parts that + # share a part number collapse into one BOM line, even if their Value labels + # differ (e.g. the two KF128 connectors J1/J3). + rows = OrderedDict() # (lcsc, footprint) -> {"refs": [], "comments": []} + for sym in instance_symbols(root): + b = child(sym, "in_bom") + if b is not None and unq(b[1]).lower() == "no": + continue + p = props_of(sym) + ref = p.get("Reference", "") + if not ref or ref.startswith("#"): + continue + lcsc = (p.get("LCSC Part") or p.get("LCSC") or "").strip() + if not lcsc: + continue + footprint = p.get("Footprint", "").split(":", 1)[-1] # drop library nickname + entry = rows.setdefault((lcsc, footprint), {"refs": [], "comments": []}) + entry["refs"].append(ref) + comment = p.get("Value", "") + if comment and comment not in entry["comments"]: + entry["comments"].append(comment) + return rows + + +def write_csv(rows, out_path, designators_from=None): + keep = None + if designators_from: + keep = set() + with open(designators_from, newline="") as fh: + for row in csv.DictReader(fh): + d = (row.get("Designator") or row.get("Ref") or "").strip() + if d: + keep.add(d) + out = [] + for (lcsc, footprint), entry in rows.items(): + refs = [r for r in entry["refs"] if keep is None or r in keep] + if not refs: + continue + refs.sort(key=natural_key) + comment = " / ".join(entry["comments"]) + out.append([comment, ",".join(refs), footprint, lcsc]) + out.sort(key=lambda r: natural_key(r[1].split(",")[0])) + + lines = ["Comment,Designator,Footprint,LCSC Part #"] + for comment, desig, footprint, lcsc in out: + cells = [comment, desig, footprint, lcsc] + if any(("," in c or '"' in c) for c in cells): + cells = ['"' + c.replace('"', '""') + '"' for c in cells] + lines.append(",".join(cells)) + text = "\n".join(lines) + "\n" + if out_path and out_path != "-": + Path(out_path).parent.mkdir(parents=True, exist_ok=True) + Path(out_path).write_text(text) + total = sum(len(r[1].split(",")) for r in out) + print(f"wrote {out_path} lines={len(out)} designators={total}" + + (f" (restricted to {designators_from})" if keep is not None else "")) + else: + sys.stdout.write(text) + + +def main(): + ap = argparse.ArgumentParser(description="KiCad schematic -> JLCPCB BOM CSV") + ap.add_argument("schematic", help="path to .kicad_sch") + ap.add_argument("-o", "--output", default="-", help="output CSV ('-' = stdout)") + ap.add_argument("--designators-from", default=None, + help="restrict to designators listed in this CPL/BOM CSV") + args = ap.parse_args() + write_csv(collect(args.schematic), args.output, args.designators_from) + + +if __name__ == "__main__": + main() diff --git a/scripts/jlc_cpl.py b/scripts/jlc_cpl.py new file mode 100755 index 0000000..dfadb21 --- /dev/null +++ b/scripts/jlc_cpl.py @@ -0,0 +1,103 @@ +#!/usr/bin/env python3 +"""Convert a KiCad ``kicad-cli pcb export pos`` CSV into JLCPCB's CPL format. + +JLCPCB's assembly uploader wants a placement file with these exact columns: + + Designator,Val,Package,Mid X,Mid Y,Rotation,Layer + +KiCad's position export writes: + + Ref,Val,Package,PosX,PosY,Rot,Side + +so this only renames columns and normalises the side (top/bottom -> Top/Bottom) +and rotation. Coordinates are passed through unchanged, so the Gerbers and the +CPL must be exported with the same origin (see docs/jlcpcb-fabrication.md). + +This does NOT correct part rotations. JLCPCB's rotation convention differs from +KiCad's for some packages; always eyeball the assembly preview before paying. + +Usage: + python3 scripts/jlc_cpl.py build/fab/TEG-pos.csv -o build/fab/TEG-CPL-jlcpcb.csv +""" +import argparse +import csv +import re +import sys +from pathlib import Path + +# KiCad header -> JLCPCB header +HEADER = { + "Ref": "Designator", + "Designator": "Designator", + "Val": "Val", + "Package": "Package", + "PosX": "Mid X", + "PosY": "Mid Y", + "Rot": "Rotation", + "Rotation": "Rotation", + "Side": "Layer", + "Layer": "Layer", +} +OUT_COLS = ["Designator", "Val", "Package", "Mid X", "Mid Y", "Rotation", "Layer"] + + +def natural_key(ref): + return [int(t) if t.isdigit() else t for t in re.split(r"(\d+)", ref)] + + +def num(x): + try: + f = float(x) + except (TypeError, ValueError): + return x + s = f"{f:.6f}".rstrip("0").rstrip(".") + return s if s not in ("", "-0") else "0" + + +def convert(rows): + out = [] + for row in rows: + rec = {} + for k, v in row.items(): + k = (k or "").strip() + if k in HEADER: + rec[HEADER[k]] = (v or "").strip() + if not rec.get("Designator"): + continue + layer = rec.get("Layer", "").strip().lower() + rec["Layer"] = {"top": "Top", "bottom": "Bottom", "t": "Top", "b": "Bottom"}.get(layer, rec.get("Layer", "")) + rec["Mid X"] = num(rec.get("Mid X", "")) + rec["Mid Y"] = num(rec.get("Mid Y", "")) + rec["Rotation"] = num(rec.get("Rotation", "")) + out.append(rec) + out.sort(key=lambda r: natural_key(r["Designator"])) + return out + + +def main(): + ap = argparse.ArgumentParser(description="KiCad pos CSV -> JLCPCB CPL CSV") + ap.add_argument("pos_csv", help="KiCad position CSV (from 'pcb export pos')") + ap.add_argument("-o", "--output", default="-", help="output CSV ('-' = stdout)") + args = ap.parse_args() + + with open(args.pos_csv, newline="") as fh: + rows = list(csv.DictReader(fh)) + out = convert(rows) + + import io + buf = io.StringIO() + w = csv.DictWriter(buf, fieldnames=OUT_COLS, lineterminator="\n") + w.writeheader() + w.writerows(out) + text = buf.getvalue() + + if args.output and args.output != "-": + Path(args.output).parent.mkdir(parents=True, exist_ok=True) + Path(args.output).write_text(text) + print(f"wrote {args.output} components={len(out)}") + else: + sys.stdout.write(text) + + +if __name__ == "__main__": + main() diff --git a/scripts/validate.sh b/scripts/validate.sh index 3dc9f70..8e724ba 100755 --- a/scripts/validate.sh +++ b/scripts/validate.sh @@ -1,19 +1,116 @@ #!/usr/bin/env bash -# Validate the generated KiCad files with kicad-cli (ERC + DRC). -# Usage: scripts/validate.sh +# Validate the engineering artifacts in this repo. +# +# scripts/validate.sh # CAD artifacts + KiCad ERC/DRC (needs both toolchains) +# scripts/validate.sh --cad # code-CAD artifacts only +# scripts/validate.sh --hardware # KiCad ERC + DRC only +# scripts/validate.sh --cad --no-rebuild # artifact checks, skip the rebuild comparison +# +# The CAD half runs scripts/validate_cad.py with the repo-local .venv (create it +# with scripts/cad-setup.sh). The hardware half needs kicad-cli on PATH (or +# KICAD_CLI set); CI installs KiCad 10 from the official PPA. +# +# Exit: 0 pass, 1 validation failure, 2 missing toolchain. set -uo pipefail cd "$(dirname "$0")/.." +REPO="$PWD" -KICAD_CLI="$(command -v kicad-cli || echo "$HOME/Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli")" -echo "using: $KICAD_CLI" -"$KICAD_CLI" version +MODE=all +REBUILD=1 +for arg in "$@"; do + case "$arg" in + --all) MODE=all ;; + --cad) MODE=cad ;; + --hardware) MODE=hardware ;; + --no-rebuild) REBUILD=0 ;; + -h|--help) + sed -n '2,13p' "$0" | sed 's/^# \{0,1\}//' + exit 0 ;; + *) + echo "validate: unknown argument: $arg" >&2 + exit 2 ;; + esac +done -echo "== ERC (schematic) ==" -"$KICAD_CLI" sch erc hardware/TEG.kicad_sch --severity-all --exit-code-violations -o build/erc.rpt || true -cat build/erc.rpt +STATUS=0 +mark_status() { + if [ "$1" -eq 2 ]; then + STATUS=2 + elif [ "$1" -ne 0 ] && [ "$STATUS" -ne 2 ]; then + STATUS=1 + fi +} -echo "== DRC (board) ==" -"$KICAD_CLI" pcb drc hardware/TEG.kicad_pcb --severity-all --exit-code-violations -o build/drc.rpt || true -cat build/drc.rpt +run_cad() { + local py="$REPO/.venv/bin/python" + if [ ! -x "$py" ]; then + echo "validate: no .venv - run scripts/cad-setup.sh first" >&2 + return 2 + fi -echo "done" + local -a args=(--require-brep --json build/cad-validation.json) + [ "$REBUILD" -eq 1 ] && args+=(--rebuild) + + mkdir -p build + export LD_LIBRARY_PATH="$REPO/.venv/gl-libs/usr/lib/x86_64-linux-gnu${LD_LIBRARY_PATH:+:$LD_LIBRARY_PATH}" + echo "== CAD artifacts ==" + "$py" "$REPO/scripts/validate_cad.py" "${args[@]}" +} + +run_hardware() { + local kicad="${KICAD_CLI:-$(command -v kicad-cli || true)}" + if [ -z "$kicad" ] && [ -x "$HOME/Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli" ]; then + kicad="$HOME/Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli" + fi + if [ -z "$kicad" ] || [ ! -x "$kicad" ]; then + echo "validate: kicad-cli not found (install KiCad or set KICAD_CLI)" >&2 + return 2 + fi + + mkdir -p build + echo "== KiCad $("$kicad" version) ==" + + check() { # check + local kind=$1 input=$2 name=$3 + local -a cmd=("$kicad" "$kind") + if [ "$kind" = sch ]; then cmd+=(erc); else cmd+=(drc); fi + + # Full report for the reviewer: warns about known cosmetic issues. + "${cmd[@]}" --severity-all -o "build/${name}-all.rpt" "$input" >/dev/null 2>&1 || true + cat "build/${name}-all.rpt" + + # Gate on error-level violations only; warnings are documented in README. + local rc=0 + "${cmd[@]}" --severity-error --exit-code-violations \ + -o "build/${name}.rpt" "$input" >/dev/null 2>&1 || rc=$? + case "$rc" in + 0) ;; + 5) echo "validate: ${name} has error-level violations" >&2 + cat "build/${name}.rpt" + STATUS=1 ;; + *) echo "validate: kicad-cli ${name} failed (exit $rc)" >&2 + STATUS=1 ;; + esac + } + + check sch "$REPO/hardware/TEG.kicad_sch" erc + check pcb "$REPO/hardware/TEG.kicad_pcb" drc +} + +if [ "$MODE" = all ] || [ "$MODE" = cad ]; then + run_cad + mark_status $? +fi +if [ "$MODE" = all ] || [ "$MODE" = hardware ]; then + run_hardware + mark_status $? +fi + +if [ "$STATUS" -eq 0 ]; then + echo "validate: all checks passed" +elif [ "$STATUS" -eq 2 ]; then + echo "validate: a required toolchain is missing" >&2 +else + echo "validate: checks failed" >&2 +fi +exit "$STATUS" diff --git a/scripts/validate_cad.py b/scripts/validate_cad.py new file mode 100644 index 0000000..46089a4 --- /dev/null +++ b/scripts/validate_cad.py @@ -0,0 +1,456 @@ +#!/usr/bin/env python3 +"""Validate the committed CAD artifacts against their source and print constraints. + +This is the mechanical-CAD half of ``scripts/validate.sh`` and the job that runs +in CI. It answers the questions a reviewer would otherwise check by hand: + + * do the committed STEP/STL files exist and parse? + * is each STL a closed, consistently wound, single-body triangle mesh? + * does it sit on Z=0 and fit the Bambu A1 mini bed (P1)? + * does the mesh volume/area/envelope match the build123d solid (stale export?) + * do the STEP files re-import to the same solid? + +Usage: + scripts/validate_cad.py # artifacts only (needs build123d for STEP) + scripts/validate_cad.py --rebuild # also rebuild the model and compare + scripts/validate_cad.py --repo /tmp/x # validate another checkout + scripts/validate_cad.py --json build/cad-validation.json + +Exit codes: 0 = pass, 1 = validation failure, 2 = toolchain/environment error. +""" + +from __future__ import annotations + +import argparse +import json +import math +import struct +import sys +import tempfile +from collections import Counter +from dataclasses import dataclass, field +from pathlib import Path + +# Tolerances. These are tight enough to catch a stale export or a dropped +# feature but loose enough not to depend on a kernel version's triangulation. +WELD_DECIMALS = 4 # weld coincident STL vertices at 0.1 um +VOLUME_REL_TOL = 0.002 # 0.2 % +AREA_REL_TOL = 0.002 # 0.2 % +BBOX_ABS_TOL = 0.05 # mm +BED_TOL = 0.05 # mm + + +@dataclass +class Model: + name: str + source: str + stl: Path + step: Path + + +@dataclass +class Mesh: + triangles: list[tuple[tuple[float, float, float], ...]] + binary: bool + bbox_min: tuple[float, float, float] + bbox_max: tuple[float, float, float] + volume: float # cm^3 + area: float # mm^2 + + @property + def size(self) -> tuple[float, float, float]: + return tuple(self.bbox_max[i] - self.bbox_min[i] for i in range(3)) + + +@dataclass +class Result: + name: str + ok: bool = True + errors: list[str] = field(default_factory=list) + notes: list[str] = field(default_factory=list) + facts: dict = field(default_factory=dict) + + def fail(self, message: str) -> None: + self.ok = False + self.errors.append(message) + + def note(self, message: str) -> None: + self.notes.append(message) + + +def rel_err(actual: float, expected: float) -> float: + if expected == 0: + return abs(actual) + return abs(actual - expected) / abs(expected) + + +def read_stl(path: Path) -> Mesh: + data = path.read_bytes() + if len(data) >= 84: + (n_tri,) = struct.unpack("= 4: + verts.append(tuple(float(x) for x in parts[1:4])) + if not verts or len(verts) % 3: + raise ValueError(f"ASCII STL has {len(verts)} vertices (not a multiple of 3)") + triangles = [tuple(verts[i:i + 3]) for i in range(0, len(verts), 3)] + return summarize(triangles, binary=False) + + +def summarize(triangles, binary: bool) -> Mesh: + if not triangles: + raise ValueError("STL contains no triangles") + pts = [v for tri in triangles for v in tri] + lo = tuple(min(p[i] for p in pts) for i in range(3)) + hi = tuple(max(p[i] for p in pts) for i in range(3)) + + volume6 = 0.0 + area = 0.0 + for a, b, c in triangles: + volume6 += ( + a[0] * (b[1] * c[2] - b[2] * c[1]) + - a[1] * (b[0] * c[2] - b[2] * c[0]) + + a[2] * (b[0] * c[1] - b[1] * c[0]) + ) + ux, uy, uz = b[0] - a[0], b[1] - a[1], b[2] - a[2] + vx, vy, vz = c[0] - a[0], c[1] - a[1], c[2] - a[2] + cx, cy, cz = uy * vz - uz * vy, uz * vx - ux * vz, ux * vy - uy * vx + area += 0.5 * math.sqrt(cx * cx + cy * cy + cz * cz) + return Mesh( + triangles=triangles, + binary=binary, + bbox_min=lo, + bbox_max=hi, + volume=abs(volume6) / 6.0 / 1000.0, + area=area, + ) + + +def weld(v: tuple[float, float, float], q: int) -> tuple[int, int, int]: + return (round(v[0] * q), round(v[1] * q), round(v[2] * q)) + + +class DisjointSet: + def __init__(self) -> None: + self.parent: dict[tuple[int, int, int], tuple[int, int, int]] = {} + + def add(self, item): + self.parent.setdefault(item, item) + + def find(self, item): + root = item + while self.parent[root] != root: + root = self.parent[root] + while self.parent[item] != root: + self.parent[item], item = root, self.parent[item] + return root + + def union(self, a, b) -> None: + ra, rb = self.find(a), self.find(b) + if ra != rb: + self.parent[rb] = ra + + +def check_mesh(mesh: Mesh, result: Result, params) -> None: + q = 10 ** WELD_DECIMALS + keys = [[weld(v, q) for v in tri] for tri in mesh.triangles] + + degenerate = sum(1 for t in keys if len(set(t)) < 3) + if degenerate: + result.fail(f"{degenerate} degenerate triangle(s) (zero area)") + + directed: Counter = Counter() + for tri in keys: + for a, b in ((0, 1), (1, 2), (2, 0)): + directed[(tri[a], tri[b])] += 1 + + duplicated = sum(1 for count in directed.values() if count > 1) + open_edges = sum(1 for (a, b) in directed if (b, a) not in directed) + if duplicated or open_edges: + result.fail( + "mesh is not a closed, consistently wound surface " + f"({open_edges} open edge(s), {duplicated} duplicated directed edge(s))" + ) + + ds = DisjointSet() + for tri in keys: + for a, b in ((0, 1), (1, 2), (2, 0)): + ds.add(tri[a]) + ds.add(tri[b]) + ds.union(tri[a], tri[b]) + bodies = len({ds.find(k) for k in ds.parent}) + if bodies != 1: + result.fail(f"mesh has {bodies} disconnected bodies (expected 1)") + result.facts["bodies"] = bodies + result.facts["triangles"] = len(mesh.triangles) + result.facts["watertight"] = not (duplicated or open_edges or degenerate) + + lo = mesh.bbox_min + hi = mesh.bbox_max + if abs(lo[2]) > BED_TOL: + result.fail(f"part does not sit on the bed: min Z = {lo[2]:.3f} mm (expected 0)") + bed = (params.bed_x, params.bed_y, params.bed_z) + for axis, label in enumerate("XYZ"): + if mesh.size[axis] > bed[axis] + BED_TOL: + result.fail( + f"envelope {label} = {mesh.size[axis]:.2f} mm exceeds the " + f"{bed[axis]:g} mm bed (P1)" + ) + if hi[1] > params.depth + BED_TOL or lo[1] < -BED_TOL: + result.note(f"Y span {lo[1]:.2f}..{hi[1]:.2f} mm (hot face at Y=0)") + + result.facts["envelope_mm"] = [round(x, 3) for x in mesh.size] + result.facts["volume_cm3"] = round(mesh.volume, 3) + result.facts["area_mm2"] = round(mesh.area, 1) + + +def check_step(model: Model, mesh: Mesh, result: Result) -> None: + try: + from build123d import import_step + except Exception as exc: # noqa: BLE001 - report, do not crash + result.note(f"STEP check skipped: build123d unavailable ({exc})") + return + + try: + shape = import_step(str(model.step)) + except Exception as exc: # noqa: BLE001 + result.fail(f"cannot import {model.step.name}: {exc}") + return + + step_vol = shape.volume / 1000.0 + bb = shape.bounding_box() + step_size = (bb.size.X, bb.size.Y, bb.size.Z) + if rel_err(step_vol, mesh.volume) > VOLUME_REL_TOL: + result.fail( + f"STEP volume {step_vol:.3f} cm^3 differs from STL " + f"{mesh.volume:.3f} cm^3 (limit {VOLUME_REL_TOL:.1%})" + ) + for axis, label in enumerate("XYZ"): + if abs(step_size[axis] - mesh.size[axis]) > BBOX_ABS_TOL: + result.fail( + f"STEP {label} size {step_size[axis]:.3f} mm differs from STL " + f"{mesh.size[axis]:.3f} mm" + ) + result.facts["step_volume_cm3"] = round(step_vol, 3) + + +def brep_available() -> bool: + try: + import build123d # noqa: F401 + return True + except Exception: # noqa: BLE001 + return False + + +def rebuild(model: Model, params, result: Result, tmp: Path) -> Mesh | None: + try: + from build123d import export_stl + from wedge import build_wedge + except Exception as exc: # noqa: BLE001 + result.note(f"rebuild skipped: build123d unavailable ({exc})") + return None + + part = build_wedge(params) + out = tmp / f"{model.name}.stl" + export_stl(part, str(out)) + fresh = read_stl(out) + + brep_volume = part.volume / 1000.0 + result.facts["rebuilt_volume_cm3"] = round(brep_volume, 3) + result.facts["rebuilt_stl_volume_cm3"] = round(fresh.volume, 3) + if rel_err(fresh.volume, brep_volume) > VOLUME_REL_TOL: + result.fail( + f"rebuilt STL volume {fresh.volume:.3f} cm^3 disagrees with the " + f"B-rep {brep_volume:.3f} cm^3" + ) + return fresh + + +def compare_fresh(model: Model, committed: Mesh, fresh: Mesh, result: Result) -> None: + if rel_err(fresh.volume, committed.volume) > VOLUME_REL_TOL: + result.fail( + f"committed STL is stale: volume {committed.volume:.3f} cm^3 vs " + f"rebuilt {fresh.volume:.3f} cm^3 - run scripts/cad-run.sh" + ) + if rel_err(fresh.area, committed.area) > AREA_REL_TOL: + result.fail( + f"committed STL is stale: surface area {committed.area:.1f} mm^2 vs " + f"rebuilt {fresh.area:.1f} mm^2 - run scripts/cad-run.sh" + ) + for axis, label in enumerate("XYZ"): + if abs(fresh.size[axis] - committed.size[axis]) > BBOX_ABS_TOL: + result.fail( + f"committed STL is stale: {label} size {committed.size[axis]:.2f} mm " + f"vs rebuilt {fresh.size[axis]:.2f} mm - run scripts/cad-run.sh" + ) + + +def parse_args(argv: list[str] | None) -> argparse.Namespace: + ap = argparse.ArgumentParser(description=__doc__.splitlines()[0]) + ap.add_argument( + "--repo", + type=Path, + default=Path(__file__).resolve().parent.parent, + help="repository root (default: this checkout)", + ) + ap.add_argument("--rebuild", action="store_true", + help="rebuild the canonical model and fail if exports are stale") + ap.add_argument("--no-step", action="store_true", + help="skip STEP re-import checks") + ap.add_argument("--require-brep", action="store_true", + help="fail if build123d/OCP is unavailable instead of skipping") + ap.add_argument("--json", type=Path, help="write a machine-readable report here") + return ap.parse_args(argv) + + +def main(argv: list[str] | None = None) -> int: + args = parse_args(argv) + repo: Path = args.repo.resolve() + sys.path.insert(0, str(repo / "cad")) + from parameters import DEFAULTS # noqa: E402 + + params = DEFAULTS + models = [ + Model("build123d", "cad/wedge.py", + repo / "cad/exports/wedge_enclosure.stl", + repo / "cad/exports/wedge_enclosure.step"), + ] + + results: list[Result] = [] + meshes: dict[str, Mesh] = {} + + # -- parameter invariants (the same ones the model enforces) ------------- + prm = Result("parameters") + try: + params.validate() + except Exception as exc: # noqa: BLE001 + prm.fail(f"invalid parameter set: {exc}") + ok, msg = params.fits_bed() + if not ok: + prm.fail(f"parameter envelope does not fit the bed: {msg}") + floor = params.wall - (params.magnet_thk + params.magnet_clearance) + if floor < 1.0: + prm.fail(f"magnet pocket floor {floor:.2f} mm < 1 mm (T4)") + prm.facts.update( + envelope_mm=[round(x, 3) for x in params.bounding_box()], + bed_mm=[params.bed_x, params.bed_y, params.bed_z], + magnet_floor_mm=round(floor, 3), + clamp_force_n=round(params.clamp_force_n(), 0), + ) + results.append(prm) + + has_brep = brep_available() + tmp_ctx = tempfile.TemporaryDirectory(prefix="cad-validate-") + tmp = Path(tmp_ctx.name) + try: + for model in models: + result = Result(model.name) + try: + if not model.stl.is_file(): + result.fail(f"missing STL {model.stl.relative_to(repo)}") + if not model.step.is_file(): + result.fail(f"missing STEP {model.step.relative_to(repo)}") + if not result.ok: + results.append(result) + continue + + mesh = read_stl(model.stl) + meshes[model.name] = mesh + check_mesh(mesh, result, params) + result.facts["binary_stl"] = mesh.binary + result.facts["source"] = model.source + expected = params.bounding_box() + for axis, label in enumerate("XYZ"): + if abs(mesh.size[axis] - expected[axis]) > BBOX_ABS_TOL: + result.fail( + f"{label} envelope {mesh.size[axis]:.2f} mm does not " + f"match the parameters ({expected[axis]:.2f} mm)" + ) + + if not args.no_step: + check_step(model, mesh, result) + + except Exception as exc: # noqa: BLE001 + result.fail(f"validation error: {exc}") + results.append(result) + + # -- rebuild the canonical part and compare -------------------------- + if args.rebuild: + result = next(r for r in results if r.name == "build123d") + try: + fresh = rebuild(models[0], params, result, tmp) + except Exception as exc: # noqa: BLE001 + result.fail(f"rebuild failed: {exc}") + fresh = None + if fresh is not None and "build123d" in meshes: + compare_fresh(models[0], meshes["build123d"], fresh, result) + finally: + tmp_ctx.cleanup() + + if args.require_brep and not has_brep: + results.append(Result( + "toolchain", + ok=False, + errors=["build123d/OCP is required for STEP validation but is unavailable"], + )) + + failed = [r for r in results if not r.ok] + for result in results: + status = "PASS" if result.ok else "FAIL" + facts = ", ".join(f"{k}={v}" for k, v in result.facts.items()) + print(f"[{status}] {result.name}" + (f" ({facts})" if facts else "")) + for note in result.notes: + print(f" note: {note}") + for error in result.errors: + print(f" error: {error}") + + if args.json: + args.json.parent.mkdir(parents=True, exist_ok=True) + args.json.write_text(json.dumps( + { + "ok": not failed, + "repo": str(repo), + "params": { + "envelope_mm": list(params.bounding_box()), + "bed_mm": [params.bed_x, params.bed_y, params.bed_z], + }, + "results": [ + { + "name": r.name, + "ok": r.ok, + "facts": r.facts, + "notes": r.notes, + "errors": r.errors, + } + for r in results + ], + }, + indent=2, + sort_keys=True, + ) + "\n") + print(f"report: {args.json}") + + if failed: + print(f"\n{len(failed)} check(s) failed", file=sys.stderr) + return 1 + print("\nall CAD artifact checks passed") + return 0 + + +if __name__ == "__main__": + raise SystemExit(main()) diff --git a/tests/test_wedge.py b/tests/test_wedge.py new file mode 100644 index 0000000..affa7b2 --- /dev/null +++ b/tests/test_wedge.py @@ -0,0 +1,203 @@ +"""Geometry tests for the printed wedge enclosure. + +These are the model-level half of the CAD quality gate. ``ruff`` and ``mypy`` +check the *code*; these tests build the solid and assert the things a print +depends on: one valid body, the envelope, wall thickness, and that each feature +(rebate, magnet pockets, retention holes, fan bore, clamp bosses) exists where +``cad/parameters.py`` says it should. + +Run them with ``scripts/cad-test.sh`` (sets the headless GL library path that +OCCT needs). ``scripts/validate_cad.py`` separately checks the exported STL/STEP. +""" + +from __future__ import annotations + +import sys +from pathlib import Path + +import pytest +from build123d import GeomType, Shape, Vector + +REPO = Path(__file__).resolve().parents[1] +sys.path.insert(0, str(REPO / "cad")) + +from parameters import DEFAULTS, WedgeParams # noqa: E402 +from wedge import build_wedge # noqa: E402 + +# Face radii are exact from the kernel; the tolerance only absorbs float noise +# and keeps radii 2.15/2.20 mm (clamp hole vs fan mount) from aliasing. +TOL = 0.01 + + +@pytest.fixture(scope="module") +def part() -> Shape: + return build_wedge(DEFAULTS) + + +def cylinders(part: Shape, radius: float, tol: float = TOL) -> list: + """Cylindrical faces of ``part`` whose radius matches ``radius``.""" + found = [] + for face in part.faces(): + if face.geom_type != GeomType.CYLINDER: + continue + if abs(face.radius - radius) <= tol: + found.append(face) + return found + + +# --------------------------------------------------------------------------- # +# body + envelope +# --------------------------------------------------------------------------- # +def test_builds_one_valid_solid(part: Shape) -> None: + assert len(part.solids()) == 1 + assert part.is_valid + assert part.volume > 0 + + +def test_envelope_matches_parameters_and_fits_the_a1_mini(part: Shape) -> None: + size = part.bounding_box().size + assert size.X == pytest.approx(DEFAULTS.width, abs=1e-6) + assert size.Y == pytest.approx(DEFAULTS.depth, abs=1e-6) + assert size.Z == pytest.approx(DEFAULTS.front_height, abs=1e-6) + + fits, message = DEFAULTS.fits_bed() + assert fits, message + + +def test_volume_is_a_known_good_golden(part: Shape) -> None: + # Golden value for the default parameters. A change here is a design change: + # re-print and update the number deliberately, do not loosen the tolerance. + assert part.volume / 1000.0 == pytest.approx(248.38, rel=0.005) + + +# --------------------------------------------------------------------------- # +# walls (P1/P2, and the plastic that keeps the heated face off the electronics) +# --------------------------------------------------------------------------- # +def test_wall_thickness_at_mid_depth(part: Shape) -> None: + y = DEFAULTS.depth / 2 + top = ( + DEFAULTS.front_height + + (DEFAULTS.back_height - DEFAULTS.front_height) * y / DEFAULTS.depth + ) + mid = DEFAULTS.front_height / 2 + + assert part.is_inside(Vector(0, y, top - DEFAULTS.wall / 2)) + assert not part.is_inside(Vector(0, y, top - DEFAULTS.wall * 1.5)) + + assert part.is_inside(Vector(DEFAULTS.width / 2 - DEFAULTS.wall / 2, y, mid)) + assert not part.is_inside(Vector(DEFAULTS.width / 2 - DEFAULTS.wall * 1.5, y, mid)) + + +# --------------------------------------------------------------------------- # +# hot face: metal plate rebate and the thermal break (T1/T2/T5) +# --------------------------------------------------------------------------- # +def test_hot_face_rebate_has_the_declared_floor(part: Shape) -> None: + floor_area = DEFAULTS.plate_w * DEFAULTS.plate_h + floors = [ + face + for face in part.faces() + if face.geom_type == GeomType.PLANE + and abs(face.center().Y - DEFAULTS.plate_pocket_depth) < 1e-3 + and abs(face.area - floor_area) < 1.0 + ] + assert len(floors) == 1 + + # The rebate is a void; solid plastic sits behind its floor, outside the + # metal plate's footprint. + assert not part.is_inside(Vector(0, 1.0, DEFAULTS.front_height / 2)) + assert part.is_inside( + Vector(0, DEFAULTS.plate_pocket_depth + 1.0, DEFAULTS.front_height / 2) + ) + + +# --------------------------------------------------------------------------- # +# magnets (T4) and retention screws (S2) +# --------------------------------------------------------------------------- # +def test_four_magnet_pockets_on_the_hot_face_rim(part: Shape) -> None: + pocket_r = (DEFAULTS.magnet_dia + 2 * DEFAULTS.magnet_clearance) / 2 + pockets = cylinders(part, pocket_r) + + assert len(pockets) == 4 + rim = DEFAULTS.front_height / 2 + expected_z = sorted( + [ + round(DEFAULTS.magnet_inset, 1), + round(rim, 1), + round(rim, 1), + round(DEFAULTS.front_height - DEFAULTS.magnet_inset, 1), + ] + ) + assert sorted(round(face.center().Z, 1) for face in pockets) == expected_z + for face in pockets: + assert face.center().Y < DEFAULTS.magnet_thk + DEFAULTS.magnet_clearance + + +def test_magnet_pocket_keeps_a_floor(part: Shape) -> None: + # Void inside the pocket, solid immediately behind it: the 3 mm disc must + # not break through into the cavity. + z = DEFAULTS.front_height - DEFAULTS.magnet_inset + assert not part.is_inside(Vector(0, 1.0, z)) + assert part.is_inside(Vector(0, 4.0, z)) + + +def test_retention_holes_are_present(part: Shape) -> None: + holes = cylinders(part, DEFAULTS.retention_screw_dia / 2) + assert len(holes) >= 4 + for face in holes: + assert face.center().Y < DEFAULTS.wall + DEFAULTS.clamp_boss_len + + +# --------------------------------------------------------------------------- # +# cold side: fan (P5) and clamp bosses (§8) +# --------------------------------------------------------------------------- # +def test_fan_bore_and_mounting_holes(part: Shape) -> None: + bores = cylinders(part, DEFAULTS.fan_hole_dia / 2) + assert len(bores) == 1 + assert bores[0].center().Y > DEFAULTS.depth - 3 * DEFAULTS.wall + + mounts = cylinders(part, DEFAULTS.fan_mount_dia / 2) + assert len(mounts) == 4 + expected_z = { + round(DEFAULTS.back_height / 2 - DEFAULTS.fan_mount_pitch / 2, 1), + round(DEFAULTS.back_height / 2 + DEFAULTS.fan_mount_pitch / 2, 1), + } + assert {round(face.center().Z, 1) for face in mounts} == expected_z + + +def test_clamp_bosses_and_clearance_holes(part: Shape) -> None: + bosses = cylinders(part, DEFAULTS.clamp_boss_dia / 2) + assert len(bosses) == DEFAULTS.clamp_screw_count + + holes = cylinders(part, DEFAULTS.clamp_screw_dia / 2) + assert len(holes) == DEFAULTS.clamp_screw_count + + _, array_h = DEFAULTS.teg_array_size() + offset = array_h / 2 + DEFAULTS.clamp_boss_dia / 2 + expected_z = { + round(DEFAULTS.front_height / 2 - offset, 1), + round(DEFAULTS.front_height / 2 + offset, 1), + } + assert {round(face.center().Z, 1) for face in bosses} == expected_z + + +# --------------------------------------------------------------------------- # +# parameter guards and the §8 clamp load +# --------------------------------------------------------------------------- # +def test_parameter_guards_reject_impossible_designs() -> None: + with pytest.raises(ValueError): + WedgeParams(front_height=90.0).validate() + with pytest.raises(ValueError): + WedgeParams(wall=0.0).validate() + with pytest.raises(ValueError): + WedgeParams(plate_w=200.0).validate() + + +def test_oversized_part_is_reported_off_bed() -> None: + fits, message = WedgeParams(width=200.0).fits_bed() + assert not fits + assert "200" in message + + +def test_clamp_load_matches_requirements_section_8() -> None: + assert DEFAULTS.clamp_force_n() == pytest.approx(2856.84, rel=1e-9) + assert DEFAULTS.clamp_force_per_screw_n() == pytest.approx(714.21, rel=1e-4)