From 192d3df985b97d72565b4291e47bb61cddcb4c05 Mon Sep 17 00:00:00 2001
From: radommm <radommm@gmail.com>
Date: Sat, 5 Apr 2025 20:33:41 +0200
Subject: [PATCH] reset by SCLK reset pattern while initializing

---
 src/ADS1256.cpp | 71 ++++++++++++++++++++++++++++++++++++-------------
 src/ADS1256.h   |  3 +++
 2 files changed, 56 insertions(+), 18 deletions(-)

diff --git a/src/ADS1256.cpp b/src/ADS1256.cpp
index c4b9bf0..a29ba89 100644
--- a/src/ADS1256.cpp
+++ b/src/ADS1256.cpp
@@ -48,24 +48,32 @@ ADS1256::ADS1256(const byte DRDY_pin, const byte RESET_pin, const byte SYNC_pin,
 //Initialization
 void ADS1256::InitializeADC()
 {
-  //Chip select LOW  
-  digitalWrite(_CS_pin, LOW);
-  
-  //We do a manual chip reset on the ADS1256 - Datasheet Page 27/ RESET
-  if(_RESET_pin != 0)
-  {
-  digitalWrite(_RESET_pin, LOW);
-  delay(200);
-  digitalWrite(_RESET_pin, HIGH); //RESET is set to high
-  delay(1000);
-  }
-  
-  //Sync pin is also treated if it is defined
-  if(_SYNC_pin != 0)
-  {
-  digitalWrite(_SYNC_pin, HIGH); //RESET is set to high  
-  }
-	
+	//Sync pin is also treated if it is defined. Needs to be done before resetByClk()
+	if (_SYNC_pin != 0)
+	{
+		digitalWrite(_SYNC_pin, HIGH); //SYNC is set to high  
+	}
+
+	//Chip select LOW  
+	digitalWrite(_CS_pin, LOW);
+
+	//We do a manual chip reset on the ADS1256 - Datasheet Page 27/ RESET
+	if (_RESET_pin != 0)
+	{
+		digitalWrite(_RESET_pin, LOW);
+		delay(200);
+		digitalWrite(_RESET_pin, HIGH); //RESET is set to high
+		delay(1000);
+	}
+	else
+	{ // for case RST signal is not available/defined
+		// needs to be done before SPI.begin() to be able to write to SCK pin
+		pinMode(SCK, OUTPUT);
+		resetByClk();
+		resetByClk(); // repeat for case of SCLK pattern corruption by interrupt
+		delay(100);
+	}
+
   SPI.begin();	    
 	
   //Applying arbitrary default values to speed up the starting procedure if the user just want to get quick readouts
@@ -751,3 +759,30 @@ void ADS1256::updateMUX(uint8_t muxValue)
 }
 
 
+void ADS1256::resetByClk()
+{
+	// REF: p7, Figure 2 - SCLK reset pattern
+	//  Tclkin = 130 ns for fCLKIN = 7.68MHz
+
+	digitalWrite(_CS_pin, LOW);
+	digitalWrite(SCK, LOW);
+	delay(1);
+
+	digitalWrite(SCK, HIGH);
+	delayMicroseconds(52); //400 * Tclkin
+
+	digitalWrite(SCK, LOW);
+	delayMicroseconds(1); //5 * Tclkin; 1us is actually longer but seems to be tolerated
+
+	digitalWrite(SCK, HIGH);
+	delayMicroseconds(85); //650 * Tclkin
+
+	digitalWrite(SCK, LOW);
+	delayMicroseconds(1); //5 * Tclkin
+
+	digitalWrite(SCK, HIGH);
+	delayMicroseconds(150); //1150 * Tclkin
+
+	digitalWrite(SCK, LOW);
+	delay(10);
+}
diff --git a/src/ADS1256.h b/src/ADS1256.h
index 7ab6f96..cb6430f 100644
--- a/src/ADS1256.h
+++ b/src/ADS1256.h
@@ -156,6 +156,9 @@ void updateMUX(uint8_t muxValue);
 
 void updateConversionParameter(); //Refresh the conversion parameter based on the PGA
 
+void resetByClk(); // send SCLK reset pattern
+
+
 float _VREF = 0; //Value of the reference voltage
 float conversionParameter = 0; //PGA-dependent multiplier
 //Pins