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50 | 50 |
|
51 | 51 | #define LENOVO_OTHER_MODE_GUID "DC2A8805-3A8C-41BA-A6F7-092E0089CD3B" |
52 | 52 |
|
53 | | -#define LWMI_DEVICE_ID_CPU 0x01 |
54 | | - |
55 | | -#define LWMI_FEATURE_ID_CPU_SPPT 0x01 |
56 | | -#define LWMI_FEATURE_ID_CPU_SPL 0x02 |
57 | | -#define LWMI_FEATURE_ID_CPU_FPPT 0x03 |
| 53 | +enum lwmi_feature_id_cpu { |
| 54 | + LWMI_FEATURE_ID_CPU_SPPT = 0x01, |
| 55 | + LWMI_FEATURE_ID_CPU_SPL = 0x02, |
| 56 | + LWMI_FEATURE_ID_CPU_FPPT = 0x03, |
| 57 | + LWMI_FEATURE_ID_CPU_TEMP = 0x04, |
| 58 | + LWMI_FEATURE_ID_CPU_APU = 0x05, |
| 59 | + LWMI_FEATURE_ID_CPU_CL = 0x06, |
| 60 | + LWMI_FEATURE_ID_CPU_TAU = 0x07, |
| 61 | + LWMI_FEATURE_ID_CPU_IPL = 0x09, |
| 62 | +}; |
58 | 63 |
|
59 | 64 | #define LWMI_FEATURE_ID_FAN_RPM 0x03 |
60 | 65 |
|
| 66 | +#define LWMI_TYPE_ID_CROSSLOAD 0x01 |
| 67 | + |
61 | 68 | #define LWMI_FEATURE_VALUE_GET 17 |
62 | 69 | #define LWMI_FEATURE_VALUE_SET 18 |
63 | 70 |
|
@@ -551,18 +558,72 @@ static struct tunable_attr_01 ppt_pl1_spl = { |
551 | 558 | .type_id = LWMI_TYPE_ID_NONE, |
552 | 559 | }; |
553 | 560 |
|
| 561 | +static struct tunable_attr_01 ppt_pl1_spl_cl = { |
| 562 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 563 | + .feature_id = LWMI_FEATURE_ID_CPU_SPL, |
| 564 | + .type_id = LWMI_TYPE_ID_CROSSLOAD, |
| 565 | +}; |
| 566 | + |
554 | 567 | static struct tunable_attr_01 ppt_pl2_sppt = { |
555 | 568 | .device_id = LWMI_DEVICE_ID_CPU, |
556 | 569 | .feature_id = LWMI_FEATURE_ID_CPU_SPPT, |
557 | 570 | .type_id = LWMI_TYPE_ID_NONE, |
558 | 571 | }; |
559 | 572 |
|
| 573 | +static struct tunable_attr_01 ppt_pl2_sppt_cl = { |
| 574 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 575 | + .feature_id = LWMI_FEATURE_ID_CPU_SPPT, |
| 576 | + .type_id = LWMI_TYPE_ID_CROSSLOAD, |
| 577 | +}; |
| 578 | + |
560 | 579 | static struct tunable_attr_01 ppt_pl3_fppt = { |
561 | 580 | .device_id = LWMI_DEVICE_ID_CPU, |
562 | 581 | .feature_id = LWMI_FEATURE_ID_CPU_FPPT, |
563 | 582 | .type_id = LWMI_TYPE_ID_NONE, |
564 | 583 | }; |
565 | 584 |
|
| 585 | +static struct tunable_attr_01 ppt_pl3_fppt_cl = { |
| 586 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 587 | + .feature_id = LWMI_FEATURE_ID_CPU_FPPT, |
| 588 | + .type_id = LWMI_TYPE_ID_CROSSLOAD, |
| 589 | +}; |
| 590 | + |
| 591 | +static struct tunable_attr_01 cpu_temp = { |
| 592 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 593 | + .feature_id = LWMI_FEATURE_ID_CPU_TEMP, |
| 594 | + .type_id = LWMI_TYPE_ID_NONE, |
| 595 | +}; |
| 596 | + |
| 597 | +static struct tunable_attr_01 ppt_pl1_apu_spl = { |
| 598 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 599 | + .feature_id = LWMI_FEATURE_ID_CPU_APU, |
| 600 | + .type_id = LWMI_TYPE_ID_NONE, |
| 601 | +}; |
| 602 | + |
| 603 | +static struct tunable_attr_01 ppt_cpu_cl = { |
| 604 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 605 | + .feature_id = LWMI_FEATURE_ID_CPU_CL, |
| 606 | + .type_id = LWMI_TYPE_ID_NONE, |
| 607 | +}; |
| 608 | + |
| 609 | +static struct tunable_attr_01 ppt_pl1_tau = { |
| 610 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 611 | + .feature_id = LWMI_FEATURE_ID_CPU_TAU, |
| 612 | + .type_id = LWMI_TYPE_ID_NONE, |
| 613 | +}; |
| 614 | + |
| 615 | +static struct tunable_attr_01 ppt_pl4_ipl = { |
| 616 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 617 | + .feature_id = LWMI_FEATURE_ID_CPU_IPL, |
| 618 | + .type_id = LWMI_TYPE_ID_NONE, |
| 619 | +}; |
| 620 | + |
| 621 | +static struct tunable_attr_01 ppt_pl4_ipl_cl = { |
| 622 | + .device_id = LWMI_DEVICE_ID_CPU, |
| 623 | + .feature_id = LWMI_FEATURE_ID_CPU_IPL, |
| 624 | + .type_id = LWMI_TYPE_ID_CROSSLOAD, |
| 625 | +}; |
| 626 | + |
566 | 627 | struct capdata01_attr_group { |
567 | 628 | const struct attribute_group *attr_group; |
568 | 629 | struct tunable_attr_01 *tunable_attr; |
@@ -898,17 +959,45 @@ static bool lwmi_attr_01_is_supported(struct tunable_attr_01 *tunable_attr) |
898 | 959 | .name = _fsname, .attrs = _attrname##_attrs \ |
899 | 960 | } |
900 | 961 |
|
| 962 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(cpu_temp, "cpu_temp", |
| 963 | + "Set the CPU thermal load limit"); |
| 964 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_cpu_cl, "ppt_cpu_cl", |
| 965 | + "Set the CPU cross loading power limit"); |
| 966 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_apu_spl, "ppt_pl1_apu_spl", |
| 967 | + "Set the APU sustained power limit"); |
901 | 968 | LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_spl, "ppt_pl1_spl", |
902 | 969 | "Set the CPU sustained power limit"); |
| 970 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_spl_cl, "ppt_pl1_spl_cl", |
| 971 | + "Set the CPU cross loading sustained power limit"); |
903 | 972 | LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl2_sppt, "ppt_pl2_sppt", |
904 | 973 | "Set the CPU slow package power tracking limit"); |
| 974 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl2_sppt_cl, "ppt_pl2_sppt_cl", |
| 975 | + "Set the CPU cross loading slow package power tracking limit"); |
905 | 976 | LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl3_fppt, "ppt_pl3_fppt", |
906 | 977 | "Set the CPU fast package power tracking limit"); |
| 978 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl3_fppt_cl, "ppt_pl3_fppt_cl", |
| 979 | + "Set the CPU cross loading fast package power tracking limit"); |
| 980 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl1_tau, "ppt_pl1_tau", |
| 981 | + "Set the CPU sustained power limit exceed duration"); |
| 982 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl, "ppt_pl4_ipl", |
| 983 | + "Set the CPU instantaneous power limit"); |
| 984 | +LWMI_ATTR_GROUP_TUNABLE_CAP01(ppt_pl4_ipl_cl, "ppt_pl4_ipl_cl", |
| 985 | + "Set the CPU cross loading instantaneous power limit"); |
| 986 | + |
907 | 987 |
|
908 | 988 | static struct capdata01_attr_group cd01_attr_groups[] = { |
| 989 | + { &cpu_temp_attr_group, &cpu_temp }, |
| 990 | + { &ppt_cpu_cl_attr_group, &ppt_cpu_cl }, |
| 991 | + { &ppt_pl1_apu_spl_attr_group, &ppt_pl1_apu_spl }, |
909 | 992 | { &ppt_pl1_spl_attr_group, &ppt_pl1_spl }, |
| 993 | + { &ppt_pl1_spl_cl_attr_group, &ppt_pl1_spl_cl }, |
| 994 | + { &ppt_pl1_tau_attr_group, &ppt_pl1_tau }, |
910 | 995 | { &ppt_pl2_sppt_attr_group, &ppt_pl2_sppt }, |
| 996 | + { &ppt_pl2_sppt_cl_attr_group, &ppt_pl2_sppt_cl }, |
911 | 997 | { &ppt_pl3_fppt_attr_group, &ppt_pl3_fppt }, |
| 998 | + { &ppt_pl3_fppt_cl_attr_group, &ppt_pl3_fppt_cl }, |
| 999 | + { &ppt_pl4_ipl_attr_group, &ppt_pl4_ipl }, |
| 1000 | + { &ppt_pl4_ipl_cl_attr_group, &ppt_pl4_ipl_cl }, |
912 | 1001 | {}, |
913 | 1002 | }; |
914 | 1003 |
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